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Reconfigurable Computing: Architectures and Applications

Second International Workshop, ARC 2006, Delft, The Netherlands, March 1-3, 2006, Revised Selected Papers

  • Koen Bertels
  • João M. P. Cardoso
  • Stamatis Vassiliadis
Conference proceedings ARC 2006

Part of the Lecture Notes in Computer Science book series (LNCS, volume 3985)

Table of contents

  1. Tools

    1. Jie Guo, Gleb Belov, Gerhard P. Fettweis
      Pages 419-424
    2. Bjorn De Sutter, Bingfeng Mei, Andrei Bartic, Tom Vander Aa, Mladen Berekovic, Jean-Yves Mignolet et al.
      Pages 425-430
    3. Jens Braunes, Rainer G. Spallek
      Pages 443-448
    4. Antonio Carlos S. Beck, Victor F. Gomes, Luigi Carro
      Pages 449-454
    5. Jae-Jin Lee, Gi-Yong Song
      Pages 455-460
  2. Back Matter

About these proceedings

Introduction

1 The International Workshop on Recon?gurable Computing (ARC) started in 2005 in Algarve, Portugal. The major motivation was to create an event where on-going research e?orts as well as more elaborated, interesting and hi- quality work on applied recon?gurable computing could be presented and d- cussed. Over the last couple of years recon?gurable computing has become a we- known and established research area producing interesting as well as important results in both general and embedded computing systems. It is also getting more and more interest from industry which is attracted by the (design and development) ?exibility as well as the performance improvements that can be expected from this technology. As recon?gurablecomputing has blurred the gap between software and hardware, some even speak of a radical new programming paradigm opening a new realm of unseen applications and opportunities. The logo of the ARC workshop is the Nonius, a measurement instrument used in the Portuguese period of discoveries that was invented by Pedro Nunes, a Portuguesemathematician. As the logo suggests,the main motto of ARC is to help to navigate the world of recon?gurable computing. Driven by this motto, we hope ARC contributes to solid advances on recon?gurable computing.

Keywords

EPIC Hardwarebeschreibungssprache QoS Scheduling computer architecture computer networking configuration energy efficiency image processing network on chip (NoC) neutral networks optimization organization performance analysis system on chip (SoC)

Editors and affiliations

  • Koen Bertels
    • 1
  • João M. P. Cardoso
    • 2
  • Stamatis Vassiliadis
    • 3
  1. 1.TU DelftComputer Engineering Laboratory, EEMCSThe Netherlands
  2. 2.IST/INESC-IDLisboaPortugal
  3. 3.TUDelft.Computer Engineering LabDelftThe Netherlands

Bibliographic information

  • DOI https://doi.org/10.1007/11802839
  • Copyright Information Springer-Verlag Berlin Heidelberg 2006
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Computer Science
  • Print ISBN 978-3-540-36708-6
  • Online ISBN 978-3-540-36863-2
  • Series Print ISSN 0302-9743
  • Series Online ISSN 1611-3349
  • Buy this book on publisher's site
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