SAT-Based Scalable Formal Verification Solutions

  • Malay K. Ganai
  • Aarti Gupta

Part of the Series on Integrated Circuits and Systems book series (ICIR)

Table of contents

  1. Front Matter
    Pages i-xxix
  2. Design Verification Challenges

  3. Basic Infrastructure

    1. Front Matter
      Pages 41-41
  4. Falsification

    1. Front Matter
      Pages 77-77
  5. Proof Methods

    1. Front Matter
      Pages 173-173
    2. Pages 175-183
    3. Pages 185-212
  6. Abstraction/Refinement

    1. Front Matter
      Pages 213-213
  7. Verification Procedure

    1. Front Matter
      Pages 245-245
  8. Back Matter
    Pages 297-326

About this book

Introduction

Functional verification has become an important aspect of the chip design process. Significant resources, both in industry and academia, are devoted to the design complexity and verification endeavors.

SAT-Based Scalable Formal Verification Solutions discusses in detail several of the latest and interesting scalable SAT-based techniques including: Hybrid SAT Solver, Customized Bounded/Unbounded Model Checking, Distributed Model Checking, Proofs and Proof-based Abstraction Methods, Verification of Embedded Memory System & Multi-clock Systems, and Synthesis for Verification Paradigm. These techniques have been designed and implemented in a verification platform Verisol (formally called DiVer) and have been used successfully in industry. This book provides algorithmic details and engineering insights into devising scalable approaches for an effective realization. It also includes the authors’ practical experiences and recommendations in verifying the large industry designs using VeriSol.

The book is primarily written for researchers, scientists, and verification engineers who would like to gain an in-depth understanding of scalable SAT-based verification techniques. The book will also be of interest for CAD tool developers who would like to incorporate various SAT-based advanced techniques in their products.

Keywords

algorithms complexity computer-aided design (CAD) design process model modeling

Authors and affiliations

  • Malay K. Ganai
    • 1
  • Aarti Gupta
    • 2
  1. 1.NEC Labs AmericaPrincetonUSA
  2. 2.NEC Labs AmericaPrincetonUSA

Bibliographic information

  • DOI https://doi.org/10.1007/978-0-387-69167-1
  • Copyright Information Springer-Verlag US 2007
  • Publisher Name Springer, Boston, MA
  • eBook Packages Computer Science
  • Print ISBN 978-0-387-69166-4
  • Online ISBN 978-0-387-69167-1
  • Series Print ISSN 1558-9412
  • About this book
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