Verifying modern designs requires robust and scalable approaches in order to meet more demanding time-to-market requirements. We present our SAT-based model checking platform VeriSol [53] based on robust and scalable algorithms (as discussed in Parts I-IV) that are tightly integrated for verifying large scale industry designs. We briefly discuss and analyze the strengths and weaknesses of various verification engines in VeriSol as each addresses the capacity and performance issues inherent in verifying large designs. Using several industry case studies, we describe the interplay of these engines highlighting their contribution at each step of verification. We also discuss the various modeling issues in handling complex features in real designs.
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© 2007 Springer Science+Business Media, LLC
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(2007). SAT-Based Verification Framework. In: SAT-Based Scalable Formal Verification Solutions. Series on Integrated Circuits and Systems. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-69167-1_12
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DOI: https://doi.org/10.1007/978-0-387-69167-1_12
Publisher Name: Springer, Boston, MA
Print ISBN: 978-0-387-69166-4
Online ISBN: 978-0-387-69167-1
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