Overview
- Explains System On Chip (SOC) architecture and micro-architecture design and illustration with case studies
- Explains the ASIC/SOC synthesis and performance improvement techniques
- Covers practical scenarios and issues, benefiting students and professionals alike
- Discusses systems design and testing scenarios using modern Field Programmable Gate Arrays (FPGAs)
Access this book
Tax calculation will be finalised at checkout
Other ways to access
Table of contents (16 chapters)
Keywords
About this book
Authors and Affiliations
About the author
Bibliographic Information
Book Title: Advanced HDL Synthesis and SOC Prototyping
Book Subtitle: RTL Design Using Verilog
Authors: Vaibbhav Taraate
DOI: https://doi.org/10.1007/978-981-10-8776-9
Publisher: Springer Singapore
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer Nature Singapore Pte Ltd. 2019
Hardcover ISBN: 978-981-10-8775-2Published: 18 January 2019
eBook ISBN: 978-981-10-8776-9Published: 15 December 2018
Edition Number: 1
Number of Pages: XXI, 307
Number of Illustrations: 67 b/w illustrations, 196 illustrations in colour
Topics: Circuits and Systems, Control Structures and Microprogramming, Logic Design
Industry Sectors: Aerospace, Automotive, Electronics, Energy, Utilities & Environment, Engineering, IT & Software, Oil, Gas & Geosciences, Telecommunications