Abstract
In the SOC designs, the transfer of the data from the external memories needs the dedicated memory controller. The SDRAM or DDR memory controllers are used extensively in the SOC designs. The available IPs of such kind of controllers can be integrated with other SOC components. During prototyping, it is essential to have the FPGA equivalent logic of such IP cores. By considering all above, the chapter discusses the memory controllers and their interfaces with the external memory. The timing constraints for such type of controller are decisive factor for the overall design and are discussed in this chapter.
The double data rate memory and the constraints at the interface boundary decide the overall data transfer speed.
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© 2019 Springer Nature Singapore Pte Ltd.
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Taraate, V. (2019). Memory and Memory Controllers. In: Advanced HDL Synthesis and SOC Prototyping . Springer, Singapore. https://doi.org/10.1007/978-981-10-8776-9_7
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DOI: https://doi.org/10.1007/978-981-10-8776-9_7
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Publisher Name: Springer, Singapore
Print ISBN: 978-981-10-8775-2
Online ISBN: 978-981-10-8776-9
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