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Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream

Reconfigurable Computing Is Going Mainstream

  • Conference proceedings
  • © 2002

Overview

Editors:
  1. Manfred Glesner

    1. Institut für Datentechnik, FG Mikroelektronische Systeme, Technische Universität Darmstadt, Darmstadt, Germany

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  2. Peter Zipf

    1. Institut für Datentechnik, FG Mikroelektronische Systeme, Technische Universität Darmstadt, Darmstadt, Germany

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  3. Michel Renovell

    1. Microelectronics Department, LIRMM, Montpellier Cedex, France

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 2438)

Included in the following conference series:

Conference proceedings info: FPL 2002.

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Table of contents (135 papers)

  1. Dynamic Reconfiguration 1

    1. Using PARBIT to Implement Partial Run-Time Reconfigurable Systems

      • Edson L. Horta, John W. Lockwood, Sérgio T. Kofuji
      Pages 182-191

  2. DSP Applications 2

    1. Multiplier-less Realization of a Poly-phase Filter Using LUT-based FPGAs

      • R.H. Turner, R. Woods, T. Courtney
      Pages 192-201

    2. Speech Recognition on an FPGA Using Discrete and Continuous Hidden Markov Models

      • Stephen J. Melnikoff, 1Steven F. Quigley, Martin J. Russell
      Pages 202-211

    3. FPGA Implementation of the Wavelet Packet Transform for High Speed Communications

      • Antony Jamin, Petri Mähönen
      Pages 212-221

    4. A Method for Implementing Bit-Serial Finite Impulse Response Digital Filters in FPGAs Using JBits™

      • A. Carreira, T.W. Fox, L.E. Turner
      Pages 222-231

  3. Routing & Placement

    1. Automatic Partitioning for Improved Placement and Routing in Complex Programmable Logic Devices

      • Valavan Manohararajah, Terry Borer, Stephen D. Brown, Zvonko Vranesic
      Pages 232-241

    2. Rapid and Reliable Routability Estimation for FPGAs

      • Parivallal Kannan, Shankar Balachandran, Dinesh Bhatia
      Pages 242-252

    3. Integrated Iterative Approach to FPGA Placement

      • Martin Daněk, Zdeněk Muzikář
      Pages 253-262

    4. TDR: A Distributed-Memory Parallel Routing Algorithm for FPGAs

      • Lucídio A.F. Cabral, Júlio S. Aude, Nelson Maculan
      Pages 263-270

  4. Dynamic Reconfiguration 2

    1. High-Level Partitioning of Digital Systems Based on Dynamically Reconfigurable Devices

      • Rafal Kielbik, Juan Manuel Moreno, Andrzej Napieralski, 1Grzegorz Jablonski, Tomasz Szymanski
      Pages 271-280

    2. High Speed Homology Search Using Run-Time Reconfiguration

      • Yoshiki Yamaguchi, Yosuke Miyajima, Tsutomu Maruyama, Akihiko Konagaya
      Pages 281-291

    3. Partially Reconfigurable Cores for Xilinx Virtex

      • Matthias Dyer, Christian Plessl, Marco Platzner
      Pages 292-301

    4. On-line Defragmentation for Run-Time Partially Reconfigurable FPGAs

      • Manuel G. Gericota, Gustavo R. Alves, Miguel L. Silva, José M. Ferreira
      Pages 302-311

  5. Power Estimation

    1. A Flexible Power Model for FPGAs

      • Kara K.W. Poon, Andy Yan, Steven J.E. Wilton
      Pages 312-321

    2. A Clocking Technique with Power Savings in Virtex-Based Pipelined Designs

      • Oswaldo Cadenas, Graham Megson
      Pages 322-331

    3. Energy Evaluation on a Reconfigurable, Multimedia-Oriented Wireless Sensor

      • Maurizio Martina, Guido Masera, Gianluca Piccinini, Fabrizio Vacca, Maurizio Zamboni
      Pages 332-339

    4. A Tool for Activity Estimation in FPGAs

      • E. Todorovich, M. Gilabert, G. Sutter, S. Lopez-Buedo, E. Boemo
      Pages 340-349

  6. Synthesis Issues

    1. FSM Decomposition for Low Power in FPGA

      • Gustavo Sutter, Elias Todorovich, Sergio Lopez-Buedo, Eduardo Boemo
      Pages 350-359

    2. Hybrid Routing for FPGAs by Integrating Boolean Satisfiability with Geometric Search

      • Gi-Joon Nam, Karem Sakallah, Rob Rutenbar
      Pages 360-369

    3. A Prolog-Based Hardware Development Environment

      • K. Benkrid, D. Crookes, A. Benkrid, S. Belkacemi
      Pages 370-380
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  1. Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream

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Editors and Affiliations

  • Institut für Datentechnik, FG Mikroelektronische Systeme, Technische Universität Darmstadt, Darmstadt, Germany

    Manfred Glesner, Peter Zipf

  • Microelectronics Department, LIRMM, Montpellier Cedex, France

    Michel Renovell

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