Test Planning for Core-based Integrated Circuits under Power Constraints Breeta SenGuptaDimitar NikolovErik Larsson OriginalPaper Open access 30 January 2017 Pages: 7 - 23
A Low-Cost Reliability vs. Cost Trade-Off Methodology to Selectively Harden Logic Circuits I. WaliB. DeveautourM. Sonza Reorda OriginalPaper 11 January 2017 Pages: 25 - 36
Radiation-Induced Fault Simulation of SOI/SOS CMOS LSI’s Using Universal Rad-SPICE MOSFET Model Konstantin O. PetrosyantsLev M. SamburskyBoris G. Lvov OriginalPaper 10 January 2017 Pages: 37 - 51
A High-Level Approach to Analyze the Effects of Soft Errors on Lossless Compression Algorithms Serhiy AvramenkoMatteo Sonza ReordaGörschwin Fey OriginalPaper 10 January 2017 Pages: 53 - 64
On the Consolidation of Mixed Criticalities Applications on Multicore Architectures Stefano EspositoMassimo Violante OriginalPaper 09 January 2017 Pages: 65 - 76
A HW/SW Cross-Layer Approach for Determining Application-Redundant Hardware Faults in Embedded Systems Christian BartschCarlos VillarragaWolfgang Kunz OriginalPaper 30 January 2017 Pages: 77 - 92
An Efficient Reverse Engineering Hardware Trojan Detector Using Histogram of Oriented Gradients Abdurrahman A. NasrMohamed Z. Abdulmageed OriginalPaper 22 December 2016 Pages: 93 - 105
Golden-Free Hardware Trojan Detection with High Sensitivity Under Process Noise Tamzidul HoqueSeetharam NarasimhanSwarup Bhunia OriginalPaper 28 December 2016 Pages: 107 - 124
High Speed Energy Efficient Static Segment Adder for Approximate Computing Applications R . JothinC. Vasanthanayaki OriginalPaper 07 January 2017 Pages: 125 - 132
Fast and Automated Electromigration Analysis for CMOS RF PA Design Junjie GuHaipeng FuJianguo Ma OriginalPaper 29 January 2017 Pages: 133 - 140
