Abstract
Cellular Automata (CA) have been proposed as popular VLSI primitives owing to their regular, cascadable structure, and supposedly local interconnects. However, rather surprisingly, the published literature does not stress that the regularity and locality of interconnects is often more logical rather than being of physical nature, and requires proper design methodologies to harness the advantage of CA in practical circuits. We address this issue with a case study of a one-dimensional (1-D) CA, and develops a methodology for the physical realization of such circuits. The main idea is to make optimal use of the underlying architecture, especially the hardware logic resources available in the FPGA slices , coupled with direct primitive instantiation and constrained placement of the logic elements.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
References
Ahmed, T., Kundarewich, P.D., Anderson, J.H.: Packing techniques for Virtex-5 FPGAs. ACM Trans. Reconfigurable Technol. Syst. (TRETS) 2(18), 18:24 (2009)
Areibi, S., Grewal, G., Banerji, D., Du, P.: Hierarchical FPGA placement. Can. J. Electr. Comput. Eng. 32(1), 53–64 (2007)
Cattell, K. Muzio, J.: Technical Report: Tables of linear cellular automata for minimal weight primitive polynomials of degrees upto 300. Issue: 163. University of Victoria (B.C.) Department of Computer Science (1991)
Cattell, K., Muzio, J.C.: Synthesis of one-dimensional linear hybrid Cellular Automata. IEEE Trans. Comput.-Aided Des. Integ. Circuits and Syst. 15(3), 325–335 (1996)
Chaudhuri, P.P., Chowdhury, D.R., Nandi, S., Chattopadhyay, S.: Additive Cellular Automata theory and its application. IEEE Comput. Soc. Press, 1 (1997)
Chattopadhyay, S., Roy, S., Chaudhuri, P.P.: Technology mapping on a multi-output logic module built around Cellular Automata array for a new FPGA architecture. In: Proceedings of the 8th International Conference on VLSI Design, pp. 57–62 (1995)
Chowdhury, D.R., Chaudhuri, P.P.: Architecture for VLSI design of CA based byte error correcting code decoders. In: Proceedings of the 7th International Conference on VLSI Design, pp. 283–286 (1994)
Chowdhury, D.R., Gupta, I.S., Chaudhuri, P.P.: CA-based byte error-correcting code. IEEE Trans. Comput. 44(3), 371–382 (1995)
Das, A.K., Ganguly, A., Dasgupta, A., Bhawmik, S., Chaudhuri, P.P.: Efficient characterization of Cellular Automata. IEE Proc. E Compu. Digital Techn. 137(1), 81–87 (1990)
Halbach, M., Hoffmann, R.: Implementing Cellular Automata in FPGA logic. In: Proceedings of the 18th International Parallel and Distributed Processing Symposium, pp. 258–262 (2004)
Mukhopadhyay, D.: Group properties of non-linear Cellular Automata. J. Cellular Autom. 5(1–2), 139–155 (2010)
Nandi, S., Rambabu, C., Chaudhuri, P.P.: A VLSI Architecture for Cellular Automata based reed-solomon decoder. In: Proceedings of the 4th International Symposium on Parallel Architectures, Algorithms, and Networks (I-SPAN), pp. 158–165 (1999)
Palchaudhuri, A., Chakraborty, R.S., Salman, M., Kardas, S., Mukhopadhyay, D.: Highly Compact Automated Implementation of Linear CA on FPGAs. In: Cellular Automata - 11th International Conference on Cellular Automata for Research and Industry (ACRI), Series Lecture Notes in Computer Science, vol. 8751, pp. 388–397 (2014)
Sarkar, P.: A brief history of Cellular Automata. ACM Comput. Surv. (CSUR) 32(1), 80–107 (2000)
Sirakoulis, G.C., Karafyllidis, I., Thanailakis, A., Mardiris, V.: A methodology for VLSI implementation of Cellular Automata algorithms using VHDL. Adv. Eng. Softw. 32(3), 189–202 (2000)
Torres-Huitzil, C., Delgadillo-Escobar, M., Nuno-Maganda, M.: Comparison between 2D Cellular Automata based pseudorandom number generators. IEICE Electron. Express. 9(17), 1391–1396 (2012)
Bardell, P.H., McAnney, W.H., Savir, J.: Built-In Test for VLSI: Pseudorandom Techniques. Wiley, New York (1987)
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2016 Springer India
About this chapter
Cite this chapter
Palchaudhuri, A., Chakraborty, R.S. (2016). Compact FPGA Implementation of Linear Cellular Automata. In: High Performance Integer Arithmetic Circuit Design on FPGA. Springer Series in Advanced Microelectronics, vol 51. Springer, New Delhi. https://doi.org/10.1007/978-81-322-2520-1_6
Download citation
DOI: https://doi.org/10.1007/978-81-322-2520-1_6
Published:
Publisher Name: Springer, New Delhi
Print ISBN: 978-81-322-2519-5
Online ISBN: 978-81-322-2520-1
eBook Packages: EngineeringEngineering (R0)