Overview
- Describes the optimized implementations of several arithmetic data path, control path and pseudorandom sequence generator circuits
- Proposed designs outperform and have superior operand-width scalability, compared to implementations based on native DSP hard macros provided by Xilinx or those derived by the traditional Behavioral HDL-to-implementation design flow
- Proposes a unified framework to design and implement high performance integer arithmetic circuits using "fabric logic" available on the leading FPGA platforms from Xilinx
- Provides detailed mathematical analysis aimed at deriving the proposed architectures step-by-step
- Describes and implements Design automation of the proposed design methodology, which integrates easily into the standard (non-licensed) Xilinx ISE design environment
- Includes supplementary material: sn.pub/extras
Part of the book series: Springer Series in Advanced Microelectronics (MICROELECTR., volume 51)
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Table of contents (8 chapters)
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Front Matter
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Back Matter
Keywords
About this book
Authors and Affiliations
About the authors
Ayan Palchaudhuri is a Ph.D. student in the Department of Electronics and Electrical Communication Engineering (E&ECE) of Indian Institute of Technology (IIT) Kharagpur. He has received the M.S. degree from the Department of Computer Science and Engineering (CSE), IIT Kharagpur, in 2015. He has over two-and-a-half years of work experience as a Junior Project Assistant in the Department of CSE, IIT Kharagpur. His research interests include VLSI Architecture Design and Computer Arithmetic. He is the co-author of two conference papers, one journal, one book chapter and a patent has been filed based on his research work. His research work has been recognized with the Best Poster Award in the Student Research Symposium of the 21st IEEE International Conference on High Performance Computing (HiPC) 2014.
Rajat Subhra Chakraborty is Assistant Professor in the Computer Science and Engineering Department of Indian Institute of Technology Kharagpur. He has a Ph.D. in Computer Engineering from Case Western Reserve University (Ohio, U.S.A.) and a B.E. (Hons.) in Electronics and Telecommunication Engineering from Jadavpur University (India) in 2005. He has work experience at National Semiconductor and AMD. His research interests include: Hardware Security, VLSI Design and Design Automation and Reversible Watermarking for digital content protection. He is the co-author of two published books, four book chapters and over 50 publications in international journals and conferences of repute. He is one of the recipients of the "IBM Faculty Award" for 2012, and a "Royal Academy of Engineering (U.K.) Fellowship" in 2014. He holds 1 U.S. patent, and 2 more international patents and 3 Indian patents have been filed based on his research work. Dr. Chakraborty is a member of IEEE and ACM.
Bibliographic Information
Book Title: High Performance Integer Arithmetic Circuit Design on FPGA
Book Subtitle: Architecture, Implementation and Design Automation
Authors: Ayan Palchaudhuri, Rajat Subhra Chakraborty
Series Title: Springer Series in Advanced Microelectronics
DOI: https://doi.org/10.1007/978-81-322-2520-1
Publisher: Springer New Delhi
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer India 2016
Hardcover ISBN: 978-81-322-2519-5Published: 16 July 2015
Softcover ISBN: 978-81-322-3435-7Published: 23 October 2016
eBook ISBN: 978-81-322-2520-1Published: 06 July 2015
Series ISSN: 1437-0387
Series E-ISSN: 2197-6643
Edition Number: 1
Number of Pages: XVII, 114
Number of Illustrations: 56 b/w illustrations
Topics: Circuits and Systems, Electronics and Microelectronics, Instrumentation, Logic Design
Industry Sectors: Aerospace, Automotive, Electronics, Energy, Utilities & Environment, Engineering, IT & Software, Oil, Gas & Geosciences, Telecommunications