Abstract
This paper presents a hybrid architecture for accelerating search and update operations on Semantic Web indices. This database system uses a B\(^+\)-tree index structure distributed in a Field Programmable Gate Array (FPGA) and a CPU-based host system. The index is divided into two parts. The host system stores the values and the keys of the lower levels of the B\(^+\)-tree while a certain amount of the frequently accessed levels including the tree root is stored in the FPGAs internal and attached memory. Inside the FPGA we accelerate search operations by exploiting the parallel nature of the FPGA. By this, update operations can benefit from the speed up of their necessary searches. Furthermore, we estimate the performance based on the given experiments in a worst case scenario.
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This work is funded by the German Research Foundation (DFG) project GR 3435\9-1.
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Heinrich, D., Werner, S., Blochwitz, C., Pionteck, T., Groppe, S. (2018). Search & Update Optimization of a B\(^+\) Tree in a Hardware Aided Semantic Web Database System. In: Lee, W., Choi, W., Jung, S., Song, M. (eds) Proceedings of the 7th International Conference on Emerging Databases. Lecture Notes in Electrical Engineering, vol 461. Springer, Singapore. https://doi.org/10.1007/978-981-10-6520-0_18
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DOI: https://doi.org/10.1007/978-981-10-6520-0_18
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