Abstract
With the growing popularity of Internet and extensive use of E-mail as a communication media, the volume of Spam mails has seen to be growing at a phenomenal rate. The growing volume of Spam mails as well as their mutating nature annoys people and affects work efficiency significantly. The unsolicited emails or Spam’s used to be deliberated of as just a nuisance, in the past few decades, however in the last few years; their annoyance has reached to epidemic proportions. Thus the Spam mails have has really become a nightmare for every email user. This chapter presents Anti-Spam solution prototyped on Xilinx Spartan 3e FPGA and designed using Handel C. We have adopted the hardware-software co-design methodology and the same is described from scratch. Two IP cores have been designed viz. Content Addressable Memory (CAM) and Bloom Filter in Handel C and the same have been deployed on the Spartan 3e FPGA along with the customizable version of Microblaze. The main contribution is reporting the technical know how related to the co-design aspects that comprehends synergic mixture of soft IP cores of the content addressable memory (CAM) and bloom filter realized both in hardware and software with the Xilinx Microblaze processor. The toolset used for the hardware-software co-design is the Xilinx Embedded Design Kit (EDK). The design flow comprises of the IP core design in Handel-C, embedded in EDK driven by the central customized core of Microblaze.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Notes
- 1.
The major part of the internet volume (80% according to [20]) is related to peer-to-peer (P2P) file sharing. Followed by Web browsing, electronic mails (emails), File Transfer Protocol (FTP), Remote login (telnet), Instant Messaging (IM) and Media Distribution (audio and video streaming).
- 2.
A Netizen (a portmanteau of Internet and citizen) or cybercitizen is a person actively involved in online communities.
- 3.
Hormel Foods Corporation, the maker of SPAM luncheon meat, does not object to the Internet use of the term “Spamming”. However, they did ask that the capitalized word “SPAM” be reserved to refer to their product and trademark. By and large, this request is obeyed in forums which discuss Spam. The same convention is also followed in the present chapter.
- 4.
In addition to the email Spam, the term is also been applied to similar abuses in other media: instant messaging Spam, Usenet newsgroup Spam, Web search engine Spam, Spam in blogs, wiki Spam, online classified ads Spam, mobile phone messaging Spam, Internet forum Spam, junk fax transmissions, and file sharing network Spam.
- 5.
The proposal is available on web at URL: http://www.cs.ucsd.edu/users/savage/papers/CIEDProposal.pdf
- 6.
More information available at Xilinx website: http://www.xilinx.com/tools/webpack.htm
- 7.
More information available at Xilinx website: http://www.xilinx.com/tools/platform.htm
References
Kamat, R.K., Shinde, S.A., Shelake, V.G.: Unleash the System on Chip Using FPGAs and Handel C. Springer, New York (2009)
Laung-Terng, W., Chang, Y.-W., Cheng, K.-T.: Electronic Design Automation: Synthesis, Verification, and Test. Morgan Kaufmann/Elsevier, Amsterdam (2009). Print
Jansen, D.: The Electronic Design Automation Handbook. Springer, Dordrecht (2003)
Laung-Terng, W., Cheng-Wen, W., Cheng-Wen, W. (EE Ph.D.), Xiaoqing, W.: VLSI Test Principles and Architectures (2006)
Scheffer, L., Lavagno, L., Martin, G.E.: EDA for IC Implementation, Circuit Design, and Process Technology. CRC Taylor & Francis, Boca Raton (2006)
Rahman, A.: FPGA Based Design and Applications. Springer, London (2010)
Chandrashekar, S.: Advantages of FPGA design methodologies, EE Times. Retrieved from http://www.eetimes.com/news/design/showArticle.jhtml?articleID=26100997
Guo-Qing, Z., Guo-Qiang, Z., Qing-Feng, Y., Su-Qi, C., Tao, Z.: Evolution of the internet and its cores. New J. Phys. 10 (2008) 123027
Apté, C., Damerau, F., Weiss, S.M.: Automated learning of decision rules for text categorization. ACM Trans. Info. Syst. 12(3), 233–251 (1994)
Hecht, J.: Spam could be betrayed by hidden patterns. New Sci. 202(2707), 20 (2009)
Hoffman, P., Crocker, D.: Unsolicited bulk email: mechanisms for control. Internet Mail Consortium, UBE-SOL IMCR-008. http://www.imc.org/ube-sol.html. Revised 4 May 1998
Crocker, D.: Challenges in anti-spam efforts by Dave Crocker, brandenburg internet working. Reprinted from The Internet Protocol Journal (IPJ). 8(4) Dec 2005. IPJ is a quarterly technical journal published by Cisco Systems. See www.cisco.com/ipj
Marriam websters dictionary : Definition of spam. Retrieved from http://www.merriam-webster.com/dictionary/Spam. Accessed 2 Apr 2009
Southwick, S., Falk, J.: The NET Abuse FAQ. Retrieved from http://www.cybernothing.org/faqs/net-abuse-faq.html#2.1 (1998). Accessed 2 Apr 2008
CNN.: Anti-spam plea to ’dump the junk’. Online: http://edition.cnn.com/2003/TECH/05/22/Spam.survey/index.html. Downloaded 7 June 2006
SpamHAUS : The definition of spam. Retrieved from http://www.Spamhaus.org/definition.html (2008). Accessed 2 Apr 2009
Cohen, J.: Spam finally has a definition. Retrieved from http://www.dmnews.com/Spam-finally-has-a-definition/article/107514/ (2008). Accessed 3 April 2009
Goldsborough, R.: Bulk e-mail doesn't have to be Spam. (A Tech Perspective). (Brief Article): an article from Communit. Cox, Matthews (2002)
Chelluri, S.R., Mackin, B., Gamba, D.: FPGA-based solutions for storage-area networks. XCell J., pp. 45–47, 2006
Handel-C Language Reference Manual. Embedded Solutions Limited: Version 2.1
Wolf, W.: A decade of hardware/software codesign. IEEE Comput. 36, 38–43 (2003)
Prakash, S., Parker, A.C.: SOS: synthesis of application-specific heterogeneous multiprocessor systems. J. Parallel Distrib. Comput. 16, 338–351 (1992)
Gupta, R.K., De Micheli, G.: Hardware/software cosynthesis for digital systems. IEEE Des. Test Comput. 10, 29–41 (1993)
Ernst, R., Henkel, J., Benner, T.: Hardware/software cosynthesis for microcontrollers. IEEE Des. Test Comput. 10, 64–75 (1993)
Sudarshan, T.S.S.: Presentation on reconfigurable computing introduction to codesign. Retrieved from http://www.csis.bits-pilani.ac.in/faculty/tsbs/Main/Courses/Reconfig_09/lecses/pdf6p/lec25.pdf
Hardware-Software Codesign. Retrieved from www.npd-solutions.com/swcodesign.html
Hardware-Software Codesign Presentation. www.cs.ccu.edu.tw/∼pahsiung/…/SoC_Design_Flow_Tools_Codesign_2005.pdf
Balarin, F., et al.: Hardware-Software Co-design of Embedded Systems – The POLIS Experience. Kluwer Academic, Boston (1997)
Eker, J., Janneck, J.W., Lee, E.A., Liu, J., Liu, X., Ludvig, J., Neuendorffer, S., Sachs, S., Xiong, Y.: Taming heterogeneity—the Ptolemy approach. Proc. IEEE 91(2) (2003)
Ishikawa, M., McCune, D.J., Saikalis, G., Oho, S.: CPU model-based hardware/software co-design, co-simulation and analysis technology for real-time embedded control systems. In: 13th IEEE Real Time and Embedded Technology and Applications Symposium (RTAS'07), rtas, Washington, DC, pp. 3–11, 16–19 Apr 2007
Madsen, J., GRODE, J., Knudsen, P.V., Petersen, M.E., Haxthausen, A.: LYCOS: the Lyngby co-synthesis system. Des. Autom. Embed. Syst. 2, 195–235 (1997). Kluwer Academic Publishers, Boston. Manufactured in The Netherlands
Ade, M., Lauwereins, R.J., Peperstraete, A.: Hardware-software codesign with GRAPE. In: Sixth IEEE International Workshop on Rapid System Prototyping (RSP’95), rsp, North Carolina, p. 40, 7–9 June 1995
Ebcioglu, K.: The IBM PERCS project: hardware-software co-design of a supercomputer for high programmer productivity, WASP 2005 Keynote
Li, Y., Callahan, T., Darnell, E., Harr, R., Kurkure, U., Stockwood, J.: Hardware-software co-design of embedded reconfigurable architectures, Annual ACM IEEE Design Automation Conference Archive. In: Proceedings of the 37th Conference on Design Automation, Los Angeles, pp. 507–512, ISBN:1-58113-187-9, 2000
Lau, D., Pritchard, O., Molson, P.: Automated generation of hardware accelerators with direct memory access from ANSI/ISO standard C functions, field-programmable custom computing machines, FCCM ’06. In: 14th Annual IEEE Symposium, Napa, pp. 45–56, ISBN: 0-7695-2661-6, 24–26 Apr 2006
Merchant, S., Peterson, G.D., Bouldin, D.: Improving embedded systems education: laboratory enhancements using programmable systems on chip, Microelectronic Systems Education, 2005, (MSE ’05). In: Proceedings. 2005 IEEE International Conference on Publication Date: pp. 5–6, Anaheim, 12–14 June 2005
Lahiri, K., Raghunathan, A., Dey, S.: Design space exploration for optimizing on-chip communication architectures. IEEE Trans. CAD. ICs Syst. 23(6), 952–961 (2004)
XPS Timer Datasheet. Retrieved from http://www.xilinx.com/support/documentation/ipembedprocess_peripheralother_xpstimcount.htm
XPS Interrupt Controller Datasheet. Retrieved from http://www.xilinx.com/support/documentation/ipembedprocess_peripheralother_xpsinterruptcontrol1a.htm
Multi-Port Memory Controller MPMC) (v4.00.a), Product Specification DS643 January 11, 2008
Dunkels, A.: Design and implementation of the lwIP TCP/IP Stack. Retrieved from www.ece.ualberta.ca
lwIP 1.3.0 Library (v1.00.b). Retrieved from www.xilinx.com/support/documentation/sw_manuals/xilinx11/sa_lwip130_v1_00_b.pdf
Holden, S.: Spam filter evaluations. Retrieved from http://sam.holden.id.au/writings/Spam2
Bloom, B.: Space/time trade-offs in hash coding with allowable errors. Commun. ACM 13(7), 422–426 (1970)
Broder, A., Mitzenmacher, M.: Network applications of bloom filters: a survey. In: Proceedings of the 40th Annual Allerton Conference on Communication, Control, and Computing, Illionis, pp. 636–646 (2002)
Ripeanu, M., Iamnitchi, A.: Bloom filters – short tutorial. Retrieved from http://people.cs.uchicago.edu/~matei/PAPERS/bf.doc
Rambo, S.: Altera tweaks soft-core processor, Embedded.com, 02/25/03. http://www.embedded.com/story/OEG20030225S0022. Retrieved on 20 Oct 2007
QuickLogic QuickMIPS ESP is industry’s first – combines a high-speed processor with hardwired functions and field programmability, Design and Reuse Newsletter. http://www.us.design-reuse.com/news/news349.html. Retrieved on 21 Oct 2007
Author information
Authors and Affiliations
Corresponding author
Rights and permissions
Copyright information
© 2012 Springer Science+Business Media B.V.
About this chapter
Cite this chapter
Kamat, R.K., Shinde, S.A., Gaikwad, P.K., Guhilot, H. (2012). Development of FPGA Based Network on Chip for Circumventing Spam. In: Harnessing VLSI System Design with EDA Tools. Springer, Dordrecht. https://doi.org/10.1007/978-94-007-1864-7_2
Download citation
DOI: https://doi.org/10.1007/978-94-007-1864-7_2
Published:
Publisher Name: Springer, Dordrecht
Print ISBN: 978-94-007-1863-0
Online ISBN: 978-94-007-1864-7
eBook Packages: EngineeringEngineering (R0)