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  • © 2012

Harnessing VLSI System Design with EDA Tools

  • Harnessing VHDL Programming with EDA Tools covers various issues related to VHDL synergized with the EDA tools
  • Provides examples and practical tips for industry problems
  • Discusses the various issues regarding test bench development - No other book has so far covered the same

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Table of contents (5 chapters)

  1. Front Matter

    Pages i-xxvii
  2. Introduction

    • Rajanish K. Kamat, Santosh A. Shinde, Pawan K. Gaikwad, Hansraj Guhilot
    Pages 1-14
  3. Development of FPGA Based Network on Chip for Circumventing Spam

    • Rajanish K. Kamat, Santosh A. Shinde, Pawan K. Gaikwad, Hansraj Guhilot
    Pages 15-50
  4. Analog Front End and FPGA Based Soft IP Core for ECG Logger

    • Rajanish K. Kamat, Santosh A. Shinde, Pawan K. Gaikwad, Hansraj Guhilot
    Pages 51-91
  5. FPGA Based Multifunction Interface for Embedded Applications

    • Rajanish K. Kamat, Santosh A. Shinde, Pawan K. Gaikwad, Hansraj Guhilot
    Pages 93-126
  6. FPGA Based High Resolution Time to Digital Converter

    • Rajanish K. Kamat, Santosh A. Shinde, Pawan K. Gaikwad, Hansraj Guhilot
    Pages 127-146
  7. Back Matter

    Pages 147-154

About this book

With the proliferation of VHDL, the reference material also grew in the same order. Today there is good amount of scholarly literature including many books describing various aspects of VHDL. However, an indepth review of these books reveals a different story. Many of them have emerged simply as an improved version of the manual. While some of them deal with the system design issues, they lack appropriate exemplifying to illustrate the concepts. Others give large number of examples, but lack the VLSI system design issues.

In nutshell, the fact which gone unnoticed by most of the books, is the growth of the VLSI is not merely due to the language itself, but more due to the development of large number of third party tools useful from the FPGA or semicustom ASIC realization point of view. In the proposed book, the authors have synergized the VHDL programming with appropriate EDA tools so as to present a full proof system design to the readers. In this book along with the VHDL coding issues, the simulation and synthesis with the various toolsets enables the potential reader to visualize the final design. The VHDL design codes have been synthesized using different third party tools such as Xilinx Web pack Ver.11, Modelsim PE, Leonrado Spectrum and Synplify Pro. Mixed flow illustrated by using the above mentioned tools presents an insight to optimize the design with reference to the spatial, temporal and power metrics.

Authors and Affiliations

  • Dept. Electronics, VLSI Laboratory, Shivaji University, Kolhapur, India

    Rajanish K. Kamat, Santosh A. Shinde, Pawan K. Gaikwad

  • VLSI Laboratory, Department of Electronics, Shivaji University, Kolhapur, India

    Hansraj Guhilot

About the authors

This book explores various dimensions of EDA technologies for achieving different goals in VLSI system design.  Although the scope of EDA is very broad and comprises diversified hardware and software tools to accomplish different phases of VLSI system design, such as design, layout, simulation, testability, prototyping and implementation, this book focuses only on demystifying the code, a.k.a. firmware development and its implementation with FPGAs.  Since there are a variety of languages for system design, this book covers various issues related to VHDL, Verilog and System C synergized with EDA tools, using a variety of case studies such as testability, verification and power consumption.

  • Covers aspects of VHDL, Verilog and Handel C in one text;
  • Enables designers to judge the appropriateness of each EDA tool for relevant applications;
  • Omits discussion of design platforms and focuses on design case studies;
  • Uses design case studies from diversified application domains such as network on chip, hospital on chip, analog to digital conversion and embedded system design;
  • Facilitates with code and tool flows the design cycle for systems on chip with increasing complexity;
  • Demonstrates standard development cycles, making use of latest concepts such as ‘Soft IP Cores’, ‘Hardware Software Codesign’ etc.

Bibliographic Information

Buy it now

Buying options

eBook USD 84.99
Price excludes VAT (USA)
  • Available as EPUB and PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access