Abstract
A method for the generation of circuit models for fast thermal-electrical simulation of 3D device structures with a circuit simulator is proposed. It has been used for simulation of the influence of layout parameters on the Safe Operating Area of a BJT and to study the mechanisms that start breakdown processes. For a thermally instable switch-on behaviour of a BJT, a comparison with measurements has been made.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
B.H. Krabbenborg, A. Bosma, A.J. Mouthaan, H. Boezen, Proceedings of the Ninth International Conference on the Numerical Analysis of Semiconductor devices and Integrated Circuits, 6–9 April 1993, Coppermountain Colorado, USA, pp. 99–100.
B.H. Krabbenborg, R. Beltman, Ph. Wolbert, A.J. Mouthaan, Journal of Electrostatics, Vol. 28, 1992, pp. 285–299.
M. Latif, P.R. Bryant, IEEE transactions on CAD, Vol. CAD-1, No. 2, April 1982, pp. 94–101.
P.C. Munro, F.-Q. Ye, IEEE Journal of Solid State Circuits, Vol. SC-26, No. 9, Sept. 1991, pp. 1321–1324.
Author information
Authors and Affiliations
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 1993 Springer-Verlag Wien
About this paper
Cite this paper
Krabbenborg, B.H., de Graaff, H.C., Mouthan, A.J., Boezen, H., Bosma, A., Tekin, C. (1993). 3D Thermal/Electrical Simulation of Breakdown in a BJT Using a Circuit Simulator and a Layout-to-Circuit Extraction Tool. In: Selberherr, S., Stippel, H., Strasser, E. (eds) Simulation of Semiconductor Devices and Processes. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6657-4_13
Download citation
DOI: https://doi.org/10.1007/978-3-7091-6657-4_13
Publisher Name: Springer, Vienna
Print ISBN: 978-3-7091-7372-5
Online ISBN: 978-3-7091-6657-4
eBook Packages: Springer Book Archive