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2-D Electrothermal Simulation and Failure Analysis of GTO Turn-off with Complete Chopper Circuit Parasitics

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Simulation of Semiconductor Devices and Processes

Abstract

2-D electrothermal simulations of GTO-thyristor turn-off process including a complete chopper circuit and parasitic stray inductances will be presented. Turn-off failure is investigated for a single GTO cell and on a wafer scale using a homogeneous wafer, which has in parallel a one segment GTO representing a local perturbation on the wafer by a slightly different doping or carrier lifetime profile. During the spike voltage extreme power densities may result in the perturbed segment due to current filamentation. In high power GTO turn-off two destruction mechanisms have to be dealt with: 1.current-filamentation during the spike voltage period and 2.dynamic avalanche during the tail-phase.

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Author information

Authors and Affiliations

  1. Corporate Research and Development, Siemens AG, Otto-Hahn-Ring 6, D-81739, München, Germany

    Y. C. Gerstenmaier & H. Brunner

Authors
  1. Y. C. Gerstenmaier
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  2. H. Brunner
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Editor information

Editors and Affiliations

  1. Institut für Mikroelektronik, Technische Universität Wien, Austria

    Siegfried Selberherr , Hannes Stippel  & Ernst Strasser ,  & 

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© 1993 Springer-Verlag Wien

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Gerstenmaier, Y.C., Brunner, H. (1993). 2-D Electrothermal Simulation and Failure Analysis of GTO Turn-off with Complete Chopper Circuit Parasitics. In: Selberherr, S., Stippel, H., Strasser, E. (eds) Simulation of Semiconductor Devices and Processes. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6657-4_12

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  • DOI: https://doi.org/10.1007/978-3-7091-6657-4_12

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-7372-5

  • Online ISBN: 978-3-7091-6657-4

  • eBook Packages: Springer Book Archive

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