Skip to main content

Compact device model for partially depletedSOI-MOSFETs

For simulation of transient drain current arising from the floating body effects

  • Conference paper
Simulation of Semiconductor Processes and Devices 2001
  • 388 Accesses

Abstract

An accurate simulation of integrated circuits consisting of partially depleted (PD) SOI MOSFETs requires a compact MOS model including parasitic phenomena arising from the floating body. Floating body effects include the occurrence of kink in the saturation current and anomalous sub-threshold slope where impact ionization becomes relevant. In addition, the drain current overshoot [1,2] at “switch on” has been reported even in the absence of impact ionization. The drain current overshoot in PD SOI MOSFETs has a significant history dependence: during switching the body potential proportional to the remaining body charge is determined by both carrier generation/recombination in the body and leakage current through the drain/source-to-body junctions

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 169.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 219.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 219.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. K. Kato and K. Taniguchi, IEEE Trans., Electron Devices, ED-33, 133(1986)

    Article  Google Scholar 

  2. H.C. Shin et al., IEEE Trans., Electron Devices, ED-43, 318(1996)

    Article  Google Scholar 

  3. P. Su et al., Proc. of IEEE CICC, Orlando, p.197, 2000

    Google Scholar 

  4. A.L. Lacaita and L.M. Perron, Microelectronic Engineering, 48, 319(1999)

    Article  Google Scholar 

Download references

Author information

Authors and Affiliations

Authors

Editor information

Editors and Affiliations

Rights and permissions

Reprints and permissions

Copyright information

© 2001 Springer-Verlag Wien

About this paper

Cite this paper

Fujii, Y., Yoshimura, R., Matsuoka, T., Taniguchi, K. (2001). Compact device model for partially depletedSOI-MOSFETs. In: Tsoukalas, D., Tsamis, C. (eds) Simulation of Semiconductor Processes and Devices 2001. Springer, Vienna. https://doi.org/10.1007/978-3-7091-6244-6_51

Download citation

  • DOI: https://doi.org/10.1007/978-3-7091-6244-6_51

  • Publisher Name: Springer, Vienna

  • Print ISBN: 978-3-7091-7278-0

  • Online ISBN: 978-3-7091-6244-6

  • eBook Packages: Springer Book Archive

Publish with us

Policies and ethics