Abstract
In this paper, we present a self-consistent, analytical model that includes carrier quantization; short channel effects (SCE) and calculates the ballistic currents in DGFETs. We use this new tool to compare the effect of SCE and process induced variations (PIV) on Silicon (Si) and Germanium (Ge) NMOS DGFETs. Our results show that in the case of DGFETs designed to meet the ITRS High Performance (HP) requirements, even with PIV, Ge performs better than Si. Whereas, due to its poorer SCE, in the case of DGFET designed to meet the ITRS Low Standby Power (LSTP) requirements, Ge performs worse than Si.
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© 2004 Springer-Verlag Wien
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Pethe, A., Krishnamohan, T., Uchida, K., Saraswat, K.C. (2004). Analytical Modeling of Ge and Si Double-Gate(DG) NFETs and the Effect of Process Induced Variations (PIV) on Device Performance. In: Wachutka, G., Schrag, G. (eds) Simulation of Semiconductor Processes and Devices 2004. Springer, Vienna. https://doi.org/10.1007/978-3-7091-0624-2_85
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DOI: https://doi.org/10.1007/978-3-7091-0624-2_85
Publisher Name: Springer, Vienna
Print ISBN: 978-3-7091-7212-4
Online ISBN: 978-3-7091-0624-2
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