Abstract
This paper clarifies the effect of surrounding gate structure on soft error immunity in floating body type devices. Alpha-particle-induced soft error simulations were performed with surrounding gate, tri-gate and double gate transistors as transfer devices of DRAM cells. In case of surrounding gate transistor (SGT) cell, the loss of the stored charge in the storage node after an alpha-particle strike can be drastically reduced because the surrounding gate structure can suppress the floating body effect most efficiently by the highest controllability of the body potential compared with other gate structures. Therefore, SGT DRAM cell is a promising candidate for future high density DRAMs having high soft error immunity.
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Matsuoka, F., Sakuraba, H., Masuoka, F. (2004). An Analysis of the Effect of Surrounding Gate Structure on Soft Error Immuniy. In: Wachutka, G., Schrag, G. (eds) Simulation of Semiconductor Processes and Devices 2004. Springer, Vienna. https://doi.org/10.1007/978-3-7091-0624-2_84
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DOI: https://doi.org/10.1007/978-3-7091-0624-2_84
Publisher Name: Springer, Vienna
Print ISBN: 978-3-7091-7212-4
Online ISBN: 978-3-7091-0624-2
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