Simulation of the Cross-Coupling among Snap Back Devices under Transient High Current Stress

Abstract

A main issue for on-chip protection of Smart Power ICs against ESD and other transient high current pulses is the cross-coupling between the protection device (PD) and the device to be protected. In many cases both are npn transistors (e.g. parasitic of DMOS), therefore we investigate the coupled triggering of such devices by numerical device simulations. We show that even considering the separate transient trigger voltages V_tr does not guarantee protective action. Under certain conditions, even though the PD shows a lower V_tr than the circuit and it conducts the current in the beginning of the pulse, the circuit device takes over the stress current, possibly being destroyed. This explains observations of low ESD robustness and enables design measures.