Abstract
This chapter discusses two distinctive technology aspects related to the wafer itself. The first one is how to maintain a flatness of the layers built up on a wafer, despite the fact that a patterning step typically results in a characteristic surface topography. The second one is how to merge subcomponents built on separate wafers. While the semiconductor industry typically builds up the whole device (i.e., the integrated circuit—IC) on a single wafer, MEMS, with its unique micromachining approaches, quite often creates devices that involve two wafers. For solving these two challenges, two important enabling technologies are being utilized. The first one is chemical-mechanical planarization (CMP) to achieve a flat device surface. The second one is wafer bonding, allowing the merging of subcomponents of a system built up on separate wafers.
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Gatzen, H.H., Saile, V., Leuthold, J. (2015). Enabling Technologies I—Wafer Planarization and Bonding. In: Micro and Nano Fabrication. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-662-44395-8_9
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DOI: https://doi.org/10.1007/978-3-662-44395-8_9
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