Low-Power Memory Circuits

Abstract

The low-power RAM circuit [7.1–7.4] is a major area of interest in low-power LSI research. Successive advances in the low-power RAM circuit have been able to suppress chip-power consumption, which increases with increasing memory capacity, chip area, and speed. As a result, these advances — coupled with high-density memory-cell technology — have allowed chip power consumption to be maintained or lowered (Fig. 7.1), although the memory capacity of DRAM chips has increased rapidly by over six orders (1 Kb to 4 Gb) over the past 30 years. Consequently, the low-power RAM circuit has realized low-cost, high-reliability chips because it allows plastic packaging, a low operating current, and a low junction temperature. In addition, it has managed the ever-increasing memory-subsystem power caused by the increasingly high throughput requirements of various processing systems such as personal computers. Moreover, it forms not only the basis of other LSI memory chips, such as Flash memory and ROM, but also the basis of on-chip memory subsystems, such as embedded DRAMs (merged DRAM and logic) [7.3] and SRAM caches, both of which have become increasingly important in modern memory systems.