VLSI Memory Chip Design

  • Kiyoo Itoh

Part of the Springer Series in Advanced Microelectronics book series (MICROELECTR., volume 5)

Table of contents

  1. Front Matter
    Pages I-XI
  2. Kiyoo Itoh
    Pages 97-194
  3. Kiyoo Itoh
    Pages 249-337
  4. Kiyoo Itoh
    Pages 339-387
  5. Kiyoo Itoh
    Pages 389-423
  6. Kiyoo Itoh
    Pages 425-472
  7. Back Matter
    Pages 473-495

About this book

Introduction

This book features a systematic description of microelectronic device design ranging from the basics to current topics, such as low-power/ultralow-voltage designs including subthreshold current reduction, memory subsystem designs for modern DRAMs and various on-chip supply-voltage conversion techniques. It also covers process and device issues as well as design issues relating to systems, circuits, devices and processes, such as signal-to-noise and redundancy.

Keywords

DRAM Dram design and technology High signal-to-noise cell and array designs High-speed subsystem memories Low-power and ultralow-voltage design On-chip voltage converters RAM VLSI integrated circuit

Authors and affiliations

  • Kiyoo Itoh
    • 1
  1. 1.Central Research LaboratoryHitachi Ltd.Kokubunji-shi, TokyoJapan

Bibliographic information

  • DOI https://doi.org/10.1007/978-3-662-04478-0
  • Copyright Information Springer-Verlag Berlin Heidelberg 2001
  • Publisher Name Springer, Berlin, Heidelberg
  • eBook Packages Springer Book Archive
  • Print ISBN 978-3-642-08736-3
  • Online ISBN 978-3-662-04478-0
  • Series Print ISSN 1437-0387
  • About this book
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