Abstract
In this chapter, four important applications of high-frequency bipolar transistors — ECL digital circuits, high-speed optical data transmission systems, RF circuits and BiCMOS circuits — are briefly considered.
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References
J.D. Cressler. SiGe HBT technology: a new contender for Si-based RF and microwave circuit applications. IEEE Trans. Microwave Theory Tech., 46(5):572–589, 1998.
D.K. Lynn, C.S. Meyer, D.J. Hamilton. Analysis and Design of Integrated Circuits. McGraw-Hill, New York, 1967.
H.H. Mül ler, W.K. Owens, P.W.J. Verhofstadt. Fully compensated emitter-coupled logic: eliminating the drawbacks of conventional ECL. IEEE J. Solid-State Circuits, 8(5):362–367, 1973.
H.Y. Hsieh, K. Chin, C.-T. Chuang. Power partition and emitter size optimization for bipolar ECL circuits. IEEE J. Solid-State Circuits, 28(5):548–552, 1993.
J.M. McGregor, D.J. Roulston, J.S. Hamel, M. Vaidyanathan, S.C. Jain, P. Balk. A simple expression for ECL propagation delay including non-quasi-static effects. Solid-State Electron., 36(3):391–396, 1993.
G.R. Wilson. Advances in bipolar VLSI. Proc. IEEE, 78(11):1707–1719, 1990.
S. Colaco, R. Davies, D. Healey, O. Choy. Multilevel differential logic — the bipolar alternative. J. Semicustom ICs, 3(4):21–27, 1986.
B. Razavi, Y. Ota, R.G. Swartz. Design techniques for low-voltage high-speed digital bipolar circuits. IEEE J. Solid-State Circuits, 29(3):332–339, 1994.
H.M. Rein, R. Ranfft. Improved feedback ECL gate with low delay-power product for the subnanosccond region. IEEE Trans. Electron Devices, 12(1):80–82, 1977.
J.B. Hughes. Comments on “Improved Feedback ECL with low delay-power product for the subnanosecond region”. IEEE J. Solid-State Circuits, 13(2):276–278, 1978.
V. Ramakrishnan, J.N. Albers, R.N. Nottenburg. Modified feedback ECL gate for Gb/s applications. IEEE J. Solid-State Circuits, 34(2):205–211, 1999.
R.L. Treadway. DC analysis of current mode logic. IEEE Circuits Devices Mag., (March):21–35, 1989.
M. Kokado, M. Hyoshida, N. Miyoshi, K. Suzuki, M. Takaoka, N. Tsuzuki, H. Harada. A 54000-gate ECL array with substrate power supply. IEEE J. Solid-State Circuits, 24(5):1271–1274, 1989.
M. Wurzer, T.F. Meister, H. Knapp, K. Aufinger, R. Schreiter, S. Boguth, L. Treitinger. 53 GHz/static frequency divider in a Si/SiGe bipolar technology. IEEE ISSCC Tech. Dig., pp. 206–207, 2000.
H. Knapp, W. Wilhelm, M. Wurzer. A low-power 15-GHz frequency divider in a 0.8μm silicon bipolar technology. IEEE Trans. Microwave Theory Tech., 48(2):205–208, 2000.
H. Knapp, T.F. Meister, M. Wurzer, K. Aufinger, S. Boguth, L. Treitinger. A low-power 20-GHz SiGe dual-modulus prescaler. IEEE MTT-S Dig., pp. 731–734, 2000.
H. Knapp, T.F. Meister, M. Wurzer, D. Zös chg, K. Aufinger, L. Treitinger. A 79-GHz dynamic frequency divider in SiGe bipolar technology. IEEE ISSCC Tech. Dig., pp. 208–209, 2000.
M. Möller, H.-M. Rein, H. Wernz. 13 Gb/s Si-bipolar AGC amplifier IC with high gain and wide dynamic range for optical-fiber receivers. IEEE J. Solid-State Circuits, 29(7):815–822, 1994.
K. Ohhata, T. Masuda, E. Ohue, K. Washio. Design of a 32.7-GHz bandwidth AGC amplifier IC with wide dynamic range implemented in SiGe HBT. IEEE J. Solid-State Circuits, 34(9):1290–1297, 1999.
M. Wurzer, J. Böck, H. Knapp, W. Zirwas, F. Schumann, A. Felder. A 40-Gb/s integrated clock and data recovery circuit in a 50-GHz f T silicon bipolar technology. IEEE J. Solid-State Circuits, 34(9):1320–1324, 1999.
G. Georgiou, Y. Bayens, Y.-K. Chen, A.H. Gnauck, C. Gröpper, P. Pachke, R. Pullela, M. Reinhold, C. Dorschky, J.-P. Mattia, T.W. von Mohrenfels, C. Schulien. Clock and data recovery IC for 40-Gb/s fiber-optic receiver. IEEE J. Solid-State Circuits, 37(9):1120–1125, 2002.
Y.M. Greshishchev, P. Schvan, J.L. Showell, M.-L. Xu, J.J. Ojha, J.E. Rogers. A fully integrated SiGe receiver IC for 10-Gb/s data rate. IEEE J. Solid-State Circuits, 35(12):1949–1957, 2000.
M. Reinhold, C. Dorschky, E. Rose, R. Pullela, P. Mayer, F. Kunz, Y. Baeyens, T. Link, J.-P. Mattia. A fully integrated 40-Gb/s clock and data recovery IC with 1:4 DEMUX in SiGe technology. IEEE J. Solid-State Circuits, 36(12):1937–1945, 2001.
K. Washio. SiGe HBTs and ICs for optical-fiber communication systems. Solid-State Electron., 43:1619–1625, 1999.
G. Freeman, M. Meghelli, Y. Kwark, S. Zier, A. Rylyakov, M.A. Sorna, T. Tanji, O.M. Schreiber, K. Walter, J.-S. Rich, B. Jagannathan, A. Joseph, S. Subbanna. 40-Gb/s circuits built from a 120-GHz f T SiGe technology. IEEE J. Solid-State Circuits, 37(9):1106–1114, 2002.
Y. Bayens, G. Georgiou, J.S. Weiner, A. Leven, V. Houtsma, P. Pachke, Q. Lee, R.F. Kopf, Y. Yang, L. Chua, C. Chen, C.T. Liu, Y.-K. Chen. InP D-HBT ICs for 40 Gb/s and higher bitrate lightwave transceivers. IEEE J. Solid-State Circuits, 37(9):1152–1159, 2002.
K. Washio, E. Ohue, K. Oda, R. Hayami, M. Tanabe, H. Shimamoto. Optimization and characteristics related to the emitter-base junction in self-aligned SEG SiGe HBTs and their application in 72-GHz-static/92-GHz-dynamic frequency dividers. IEEE Trans. Electron Devices, 49(10):1755–1760, 2002.
J.P. Maligeorgos, J.R. Long. A low-voltage 5.1-5.8-GHz image-reject receiver with wide dynamic range. IEEE J. Solid-State Circuits, 35(12):1917–1926, 2000.
J.R. Long. A low-voltage 5.1-5.8-GHz image-reject downconverter RF-IC. IEEE J. Solid-State Circuits, 35(9):1320–1328, 2000.
B. Razavi. RF Microelectronics. Prentice Hall, Upper Saddle River, 1997.
A.A. Abidi, P.R. Gray, R.G. Meyer. Integrated Circuits for Wireless Communications. IEEE Press, New York, 1999.
H.-M. Rein, M. Möller. Design considerations for very-high-speed Si-bipolar ICs operating up to 50 Gb/s. IEEE J. Solid-State Circuits, 31(8):1076–1090, 1996.
J. Duree. An integrated silicon bipolar receiver subsystem for 900-MHz ISM band applications. IEEE J. Solid-State Circuits, 33(9):1352–1372, 1998.
D. Zöschg, W. Wilhelm, T.F. Meister, H. Knapp, H.-D. Wohlmuth, K. Aufingcr, M. Wurzer, J. Böck, H. Schäfer, A.L. Scholtz. 2dB noise figure, 10.5 GHz LNA using SiGe bipolar technology. Electron. Lett., 35:2195–2196, 1999.
D. Zös chg, W. Wilhelm, J. Böc k, H. Knapp, M. Wurzer, K. Aufinger, H.-D. Wohlmuth. A.L. Scholtz. Monolithic LNAs up to 10 GHz in a production-near 65 GHz f max silicon bipolar technology. Proc. IEEE Radio Frequency IC Symp., pp. 135–138, 2000.
O. Shana’a, I. Linscott, L. Tyler. Frequency-scalable SiGe bipolar RF front-end design. IEEE J. Solid-State Circuits, 36(6):888–895, 2001.
D. Zöschg, W. Wilhelm, T.F. Meister, H. Knapp, M. Wurzer, K. Aufinger, J. Böck, H.-D. Wohlmuth, A.L. Scholtz. Low noise amplifiers in SiGe bipolar technology. Microwave Eng. Europe, June, pp. 47–49, 2000.
W.-Z. Chen, J.-T. Wu. A 2-V 2-GHz BJT variable frequency oscillator. IEEE J. Solid-State Circuits, 33(9):1406–1410, 1998.
W.-Z. Chen, J.-T. Wu. A 2-V 1.8-GHz BJT phase-locked loop. IEEE J. Solid-State Circuits, 34(6):784–789, 1999.
M.A. Margarit, J. L. Tham, R.G. Meyer, M.J. Deen. A low-noise, low power VCO with automatic amplitude control for wireless applications. IEEE J. Solid-State Circuits, 34(6):761–771, 1999.
K.W. Kobayashi, J.C Cowles, L.T. Tran, A. Gutierrez-Aitken, M. Nishimoto, J.H. Elliott, T.R. Block, A.K. Oki, D.C. Streit. A 44-GHz-high IP3 InP HBT MMIC amplifier for low DC power millimeter-wave receiver applications. IEEE J. Solid-State Circuits, 34(9):1188–1195, 1999.
J.R. Long, M.A. Copeland, P. Schvan, R.A. Hadaway. A low-voltage silicon bipolar RF front-end for PCN receiver applications. Proc. IEEE International Solid-State Circuits Conf., pp. 140–141, 1995.
W. Simbiirger, H.-D. Wohlmuth, P. Weger, A. Heinz. A monolithic transformer coupled 5-W silicon power amplifier with 59% PAE at 0.9 GHz. IEEE J. Solid-State Circuits, 34(12):1881–1892, 1999.
W. Simbürger, A. Heinz, H.-D. Wohlmuth, J. Böck, K. Aufinger, M. Rest. A monolithic 2.5 V, 1 W silicon bipolar power amplifier with 55% PAE at 1.9 GHz. IEEE MTT-S Dig., 2000:853–856, 2000.
K. Yamamoto, S. Suzuki, K. Mori, T. Asada, T. Okuda, A. Inoue, T. Miura, K. Chomei, R. Hattori, M. Yamanouchi, T. Shimura. A 3.2-V operation single-chip dual-band AlGaAs/GaAs HDT MMIC power amplifier with active feedback circuit technique. IEEE J. Solid-State Circuits, 35(8):1109–1120, 2000.
H.J. de los Santos, B. Hoefflinger. Optimization and scaling of CMOS-bipolar drivers for VLSI interconnects. IEEE Trans. Electron Devices, 33(11):1722–1730, 1986.
E.W. Greeneich, K.L. McLaughlin. Analysis and characterization of BiCMOS for highspeed digital logic. IEEE J. Solid-State Circuits, 23(2):558–565, 1988.
G.P. Rosseel, R.W. Dutton. Influence of device parameters on the switching speed of BiCMOS buffers. IEEE J. Solid-State Circuits, 24(1):90–99, 1989.
S. Zhang, T.S. Kalkur, S. Lee, D. Chen. Analysis of the switching speed of BiCMOS buffer under high current. IEEE J. Solid-State Circuits, 29(7):787–796. 1994.
S. Zhang, T.S. Kalkur. Analysis of BiCMOS buffer for input voltages with finite rise time. IEEE J. Solid-State Circuits, 29(7):797–806, 1994.
H. Nambu, K. Kanetani, K. Yamasaki, K. Higeta, M. Usami, M. Nishiyama, K. Ohhata, F. Arakawa, T. Kusunoki, K. Yamaguchi, A. Hotta, N. Homma. A 550-ps access 900-MHz 1-Mb ECL-CMOS SRAM. IEEE J. Solid-State Circuits, 35(8):1159–1168, 2000.
B.-U. H. Klepser, M. Scholz, E. Götz. A 10-GHz SiGe BiCMOS phase-locked-loop frequency synthesizer. IEEE J. Solid-State Circuits, 37(3):328–335, 2002.
H. Nii, C. Yoshino, S. Yoshitomi, K. Inoh, H. Furuya, H. Nakajima, H. Sugaya, H. Naruse, Y. Katsumata, H. Iwai. An 0.3 μrn Si epitaxial base BiCMOS technology with 37-GHz f max and 10-V BVCEO for RF telecommunications. IEEE Trans. Electron Devices, 46(4):712–721, 1999.
D.L. Harame, D.C. Ahlgren, D.D. Coolbaugh, J.S. Dunn, G.G. Freeman, J.D. Gillis, R.A. Groves, G.N. Hendersen, R.A. Johnson, A.J. Joseph, S. Subbanna, A.M. Victor, K.M. Watson, C.S. Webster, P.J. Zampardi. Current status and future trends of SiGe BiCMOS technology. IEEE Trans. Electron Devices, 48(11):2575–2594, 2001.
D.A. Rich, M.S. Carroll, M.R. Frei, T.G. Ivanov, M. Mastrapasqua, S. Moinian, A.S. Chen, C.A. King, E. Harris, J. de Blauwe, H.-H. Vuong, V. Archer, K. Ng. BiCMOS — technology for mixed-digital, analog and RF applications. IEEE Microwave Mag., 3(2):44–55, 2002.
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Reisch, M. (2003). Applications. In: High-Frequency Bipolar Transistors. Springer Series in Advanced Microelectronics, vol 11. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-55900-6_8
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DOI: https://doi.org/10.1007/978-3-642-55900-6_8
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