Abstract
Realistic chips are composed of transistors, metal interconnects, and also substrates or basement materials that provide physical and electric supports to the chips. The popular silicon process starts from a nearly pure silicon wafer, which will be the foundation to grow active wells (p-wells and n-wells), and then in turn many layers of metal wires or interconnects. At frequency of several gigahertz, a substrate behaves mainly resistively. So, the substrate coupling which occurs mainly in the mixed-signal chip can be modeled with resistors connecting the contacts on the top surface of substrate. In this chapter, we introduce a direct boundary element method for substrate resistance extraction. With several novel techniques the method has high computational efficiency. It also demonstrates the versatility of handling substrate cases with lateral resistivity variations, which is beyond the ability of other methods.
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Yu, W., Wang, X. (2014). Substrate Resistance Extraction with Boundary Element Method. In: Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-54298-5_6
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