Abstract
Atomic force microscopy (AFM) is an important technique for measurement of the surface roughness and surface features of high technology surfaces such as semiconductor chips and micro-optics. One of the key measurands is the linewidth of semiconductor features [1]. A class of AFM instruments often called CD-AFM has been developed for the purpose of measuring linewidth accurately (Fig. 9.1). The smallest linewidth or hole diameter on a semiconductor circuit is called the critical dimension or CD. Recently, a requirement has arisen in the semiconductor industry for control, specification, and measurement of line edge roughness (LER) for functional semiconductor features, such as processor gates [2–5]. As feature dimensions become steadily smaller, the LER of a single gate is becoming a significant fraction of the gate length itself. Hence, the LER is expected to have a significant effect on properties of the gate such as leakage current. The International Technology Roadmap for Semiconductors (ITRS) [6] specifies a physical gate length for 2002 of 75 nm and a maximum LER of 3.9 nm. The effect of LER on the function of an electronic gate has been modeled by several studies and these models have been verified experimentally. This work has led in part to a succinct specification of LER requirements for current and future generations of semiconductor circuits. This specification has been inserted into the International Technology Roadmap for Semiconductors (ITRS) [6].
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Orji, N.G., Sanchez, M.I., Raja, J., Vorburger, T.V. (2004). AFM Characterization of Semiconductor Line Edge Roughness. In: Applied Scanning Probe Methods. NanoScience and Technology. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-35792-3_9
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DOI: https://doi.org/10.1007/978-3-642-35792-3_9
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