Abstract
The increasing complexity of processing algorithms has lead to the need of more and more intensive specification and validation by means of software implementations. As the complexity grows, the intuitive understanding of the specific processing needs becomes harder. Hence, the architectural implementation choices or the choices between different possible software/hardware partitioning become extremely difficult tasks. Automatic tools for complexity analysis at high abstraction level are nowadays a fundamental need. This paper describes a new automatic tool for high-level algorithmic complexity analysis, the Software Instrumentation Tool (SIT), and presents the results concerning the complexity analysis and design space exploration for the implementation of a JPEG2000 encoder using a hardware/software co-design methodology on a Xilinx Virtex-IITM platform FPGA. The analysis and design process for the implementation of a video surveillance application example is described.
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Ravasi, M., Mattavelli, M., Schumacher, P., Turney, R. (2003). High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder. In: Chico, J.J., Macii, E. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2003. Lecture Notes in Computer Science, vol 2799. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-39762-5_50
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DOI: https://doi.org/10.1007/978-3-540-39762-5_50
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-20074-1
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