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Instruction Buffering Exploration for Low Energy Embedded Processors

  • Tom Vander Aa
  • Murali Jayapala
  • Francisco Barat
  • Geert Deconinck
  • Rudy Lauwereins
  • Henk Corporaal
  • Francky Catthoor
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2799)

Abstract

For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. Especially software controlled loop buffers are energy efficient. However current compilers do not fully take advantage of the possibilities of such loop buffers. This paper presents an algorithm the explore for an application or a set of applications what is the optimal loop buffer configuration and the optimal way to use this configuration. Results for the MediaBench application suite show an additional 35% reduction (on average) in energy in the instruction memory hierarchy as compared to traditional approaches to the loop buffer without any performance implications.

Keywords

Nest Loop Optimal Loop Memory Hierarchy Design Space Exploration Local Controller 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Tom Vander Aa
    • 1
  • Murali Jayapala
    • 1
  • Francisco Barat
    • 1
  • Geert Deconinck
    • 1
  • Rudy Lauwereins
    • 2
  • Henk Corporaal
    • 3
  • Francky Catthoor
    • 2
  1. 1.ESAT/ELECTAK.U.LeuvenHeverleeBelgium
  2. 2.IMEC vzwHeverleeBelgium
  3. 3.Electrical EngineeringTU EindhovenEindhovenNetherlands

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