Advertisement

Abstract

A novel Globally Asynchronous Locally Synchronous (GALS) technique applicable to datapath architectures is presented. It is based on a request-driven operation of locally synchronous blocks. Inactivity of the request line is detected with a special time-out circuitry. When time-out occurs, clocking of the locally synchronous block is handed over to a local ring oscillator. Based on this concept, a practical hardware implementation of an asynchronous wrapper is proposed. The simulation results presented demonstrate the potential and performance of the proposed GALS architecture.

Keywords

Output Port Input Port Clock Signal Ring Oscillator Local Clock 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Yun, K.Y., Donohue, R.P.: Pausible Clocking: A first step toward heterogeneous systems. In: Proc. International Conference on Computer Design (ICCD) (October 1996)Google Scholar
  2. 2.
    Bormann, D.S., Cheoung, P.Y.K.: Asynchronous Wrapper for Heterogeneous Systems. In: Proc. International Conf. Computer Design (ICCD) (October 1997)Google Scholar
  3. 3.
    Muttersbach, J.: Globally-Asynchronous Locally-Synchronous Architectures for VLSI Systems, Doctor of Technical Sciences Dissertation, ETH Zurich, Switzerland (2001)Google Scholar
  4. 4.
    Moore, S., et al.: Self Calibrating Clocks for Globally Asynchronous Locally Synchronous System. In: Proc. International Conference on Computer Design (ICCD) (September 2000)Google Scholar
  5. 5.
    Chapiro, D.M.: Globally-Asynchronous Locally-Synchronous Systems, PhD thesis, Stanford University (October 1984)Google Scholar
  6. 6.
    Moore, S., et al.: Point to Point GALS interconnect. In: Proc. International Symposium on Asynchronous Circuits and Systems, April 2002, pp. 69–75 (2002)Google Scholar
  7. 7.
    Yun, K.Y., Dill, D.: Automatic synthesis of extended burst-mode circuits: Part I and II. IEEE Transactions on Computer-Aided Design 18(2), 101–132 (1999)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Miloš Krstić
    • 1
  • Eckhard Grass
    • 1
  1. 1.IHPFrankfurt (Oder)Germany

Personalised recommendations