Electrothermal Modeling of Carbon Nanotube-Based TSVs

  • Wen-Yan YinEmail author
  • Wen-Sheng Zhao
  • Wenchao Chen


Three-dimensional integrated circuits (3-D ICs) have attracted much interest in the past one decade because they can achieve technically breakthrough and significant enhancement in their electrical performance in comparison with that of conventional two-dimensional ICs. As the key technique for realization of ultra-high density integration and miniaturized packaging of 3-D ICs, through-silicon via (TSV) provides vertical electrical connection between different functional chips through multilayered silicon dies [1–3]. Moreover, it offers an opportunity for heterogeneously flexible integration, which is a powerful and effective solution called as “More-than-Moore” technology. Till now, there are numerous papers published on modeling, characterizing, and fabricating many different TSV structures for development of various 3-D ICs [4–13]. The most common TSV filling materials currently being used are copper (Cu), tungsten (W), and even doped poly-silicon. However, there are still some reliability and thermal management issues to be further studied in the realization of TSV-based 3-D ICs.


Contact Resistance Specific Heat Capacity Mean Free Path Transmission Line Method Coupling Noise 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



This study was supported by the National Natural Science Foundation of China under Grants 61171037, 61431014, 61504033, and 61504121.


  1. 1.
    Motoyoshi M (2009) Through-silicon via (TSV). Proc IEEE 97(1):43–48CrossRefGoogle Scholar
  2. 2.
    Katti G, Stucchi M, De Meyer K, Dehaene W (2010) Electrical modeling and characterization of through silicon via for three-dimensional ICs. IEEE Trans Electron Devices 57(1):256–261CrossRefGoogle Scholar
  3. 3.
    Van der Plas G, Limaye P, Loi I, Mercha A, Oprins H, Torregiani C, Thijs S, Linten D, Stucchi M, Katti G, Velenis D, Cherman V, Vandevelde B, Simons V, De Wolf I, Labie R, Perry D, Bronckers S, Minas N,. Cupac M, Ruythooren W, Van Lomen J, Phommahaxay A, de Potter de ten Broeck M, Opdebeeck A, Rakowski M, De Wachter B, Dehan M, Nelis M, Agarwal R, Pullini A, Angiolini F, Benini L, Dehaene W, Travaly Y, Beyne E, Marchal P (2011) Design issues and considerations for low-cost 3-D TSV IC technology. IEEE J Solid State Circuits 46(1):293–307Google Scholar
  4. 4.
    Kim J, Park JS, Cho J, Song E, Cho J, Kim H, Song T, Lee J, Lee H, Park K, Yang S, Suh M, Byun K, Kim J (2011) High-frequency scalable electrical model and analysis of a through silicon via (TSV). IEEE Trans Compon Packag Manuf Technol 1(2):181–195CrossRefGoogle Scholar
  5. 5.
    Pak JS, Kim J, Cho J, Kim K, Song T, Ahn S, Lee J, Lee H, Park K, Kim JH (2011) PDN impedance modeling and analysis of 3D TSV IC by using proposed P/G TSV array model based on separated P/G TSV and chip-PDN models. IEEE Trans Compon Packag Manuf Technol 1(2):208–219CrossRefGoogle Scholar
  6. 6.
    Saccetto D, Zervas M, Temiz Y, De Micheli G, Leblebici Y (2012) Resistive programmable through-silicon vias for reconfigurable 3-D fabrics. IEEE Trans Nanotechnol 11(11):8–11CrossRefGoogle Scholar
  7. 7.
    Kim K, Hwang C, Koo K, Cho J, Kim H, Kim JH, Lee J, Lee HD, Park KW, Pak JS (2012) Modeling and analysis of a power distribution network in TSV-based 3-D memory IC including P/G TSVs, on-chip decoupling capacitors, and silicon substrate effects. IEEE Trans Compon Packag Manuf Technol 2(12):2057–2070CrossRefGoogle Scholar
  8. 8.
    Kim J, Cho J, Kim JH, Yook JM, Kim JC, Lee J, Park K, Pak JS (2014) High-frequency scalable modeling and analysis of a differential signal through-silicon via. IEEE Trans Compon Packag Manuf Technol 4(4):697–707CrossRefGoogle Scholar
  9. 9.
    Lee DU, Kim KW, Kim KW, Lee KS, Byeon SJ, Kim JH, Lee J, Chun JH (2015) A 1.2 V 8 Gb 8-channel 128 GB/s high-bandwidth memory (HBM) stacked DRAM with effective I/O test circuits. IEEE J Solid State Circuits 50(1):191–203Google Scholar
  10. 10.
    Zhang X, Lin JK, Wickramanayaka S, Zhang S, Weerasekera R, Dutta R, Chang KF, Chui JJ, Li HY, Ho DSW, Ding L, Katti G, Bhattacharya S, Kwong DL (2015) Heterogeneous 2.5D integration on through silicon interposer. Appl Phys Rev 2:021308CrossRefGoogle Scholar
  11. 11.
    Zhao WS, Yin WY, Wang XP, Xu XL (2011) Frequency- and temperature-dependent modeling of coaxial through-silicon via for 3-D ICs. IEEE Trans Electron Devices 58(10):3358–3368CrossRefGoogle Scholar
  12. 12.
    Liang F, Wang G, Zhao D, Wang BZ (2013) Wideband impedance model for coaxial through-silicon vias in 3-D integration. IEEE Trans Electron Devices 60(8):2498–2504CrossRefGoogle Scholar
  13. 13.
    Gambino JP, Adderly SA, Knickerbocker JU (2015) An overview of through-silicon-via technology and manufacturing challenges. Microelectron Eng 135:73–106Google Scholar
  14. 14.
    Zhao WS, Yin WY (2012) Carbon-based interconnects for RF nanoelectronics. In: Webster J (ed) Wiley encyclopedia of electrical and electronics engineering. Wiley, 1–20Google Scholar
  15. 15.
    Li H, Yin WY, Banerjee K, Mao JF (2008) Circuit modeling and performance analysis of multi-walled carbon nanotube interconnects. IEEE Trans Electron Devices 55(6):1328–1337CrossRefGoogle Scholar
  16. 16.
    Chen WC, Yin WY, Jia L, Liu QH (2009) Electrothermal characterization of single-walled carbon nanotube (SWCNT) interconnect arrays. IEEE Trans Nanotechnol 8(6):718–728CrossRefGoogle Scholar
  17. 17.
    Liang F, Wang G, Ding W (2011) Estimation of time delay and repeater insertion in multiwall carbon nanotube interconnects. IEEE Trans Electron Devices 58(8):2712–2720CrossRefGoogle Scholar
  18. 18.
    Xie R, Zhang C, van der Veen MH, Arstila K, Hantschel T, Chen B, Zhong G, Robertson J (2013) Carbon nanotube growth for through silicon via application. Nanotechnology 24(12):125603Google Scholar
  19. 19.
    Wang T, Chen S, Jiang D, Fu Y, Jeppson K, Ye L, Liu J (2012) Through-silicon vias filled with densified and transferred carbon nanotube forests. IEEE Electron Device Lett 33(3):420–422CrossRefGoogle Scholar
  20. 20.
    Xu T, Wang Z, Miao J, Chen X, Tan CM (2007) Aligned carbon nanotubes for through-wafer interconnects. Appl Phys Lett 91(4):042108Google Scholar
  21. 21.
    Wang T, Jeppson K, Olofsson N, Campbell EEB, Liu J (2009) Through silicon vias filled with planarized carbon nanotube bundles. Nanotechnology 20(48):485203Google Scholar
  22. 22.
    Ghosh K, Verma YK, Tan CS (2014) Implementation of carbon nanotube bundles in sub-5 micron diameter through-silicon-via structures for three-dimensionally stacked integrated circuits. Mater Today Commun 2:16–25CrossRefGoogle Scholar
  23. 23.
    Callaway J (1959) Model for lattice thermal conductivity at low temperatures. Phys Rev 113(4):1046–1051CrossRefzbMATHGoogle Scholar
  24. 24.
    Bhttacharya S, Almaraj R, Mahapatra S (2011) Physics-based thermal conductivity model for metallic single-walled carbon nanotube interconnects. IEEE Electron Device Lett 32(2): 203–205Google Scholar
  25. 25.
    Verma R, Bhattacharya S, Mahapatra S (2011) Analytical solution of Joule-heating equation for metallic single-walled carbon nanotube interconnects. IEEE Trans Electron Dev 58(11): 3991–3996CrossRefGoogle Scholar
  26. 26.
    Pop E, Mann DA, Goodson KE, Dai HJ (2007) Electrical and thermal transport in metallic single-wall carbon nanotubes on insulating substrates. J Appl Phys 101(9):093710Google Scholar
  27. 27.
    Yu C, Shi L, Yao Z, Li D, Majumdar A (2005) Thermal conductance and thermopower of an individual single-wall carbon nanotube. Nano Lett 9(9):1842–1846CrossRefGoogle Scholar
  28. 28.
    Kim P, Shi L, Majumdar A, McEuen PL (2001) Thermal transport measurements of individual multiwalled nanotubes. Phys Rev Lett 87(21):215502Google Scholar
  29. 29.
    Zhang S, Xia M, Zhao S, Xu T, Zhang E (2003) Specific heat of single-walled carbon nanotubes. Phys Rev B 68:075415CrossRefGoogle Scholar
  30. 30.
    Hone J, Batlogg B, Benes Z, Johnson AT, Fischer JE (2000) Quantized phonon spectrum of single-wall carbon nanotubes. Science 289:1730CrossRefGoogle Scholar
  31. 31.
    Yi W, Lu L, Dian-lin Z, Pan ZW, Xie SS (1999) Linear specific heat of carbon nanotubes. Phys Rev B 59(14):9015Google Scholar
  32. 32.
    Mizel A, Benedict LX, Cohen ML, Louie SG, Zettl A, Budraa NK, Beyermann WP (1999) Analysis of the low-temperature specific heat of multi-walled carbon nanotubes and carbon nanotube ropes. Phys Rev B 60(5):3264Google Scholar
  33. 33.
    Xu C, Li H, Suaya R, Banerjee K (2010) Compact AC modeling and performance analysis of through-silicon vias in 3-D ICs. IEEE Trans Electron Devices 57(12): 3405–3417CrossRefGoogle Scholar
  34. 34.
    Harutyunyan AR, Chen G, Paronyan TM, Pigos EM, Kuznetsov OA, Hewaparakrama K, Kim SM, Zakharov D, Stach EA, Sumanasekera GU (2009) Preferential growth of single-walled carbon nanotubes with metallic conductivity. Science 326(5949):116–120CrossRefGoogle Scholar
  35. 35.
    Li H, Srivastava N, Mao JF, Yin WY, Banerjee K (2011) Carbon nanotube vias: does ballistic electron-phonon transport imply improved performance and reliability? IEEE Trans Electron Devices 58(8):2689–2701CrossRefGoogle Scholar
  36. 36.
    Zhao WS, Sun L, Yin WY, Guo YX (2014) Electrothermal modelling and characterisation of submicron through-silicon carbon nanotube bundle vias for three-dimensional ICs. Micro Nano Lett 9(2):123–126CrossRefGoogle Scholar
  37. 37.
    Wang XP, Yin WY, He S (2010) Multiphysics characterization of transient electrothermomechanical responses of through-silicon vias applied with a periodic voltage pulse. IEEE Trans Electron Devices 57(6):1382–1389CrossRefGoogle Scholar
  38. 38.
    D’Amore M, Sarto MS, D’Aloia AG (2010) Skin-effect modeling of carbon nanotube bundles: the high-frequency effective impedance. In: 2010 IEEE international symposium on electromagnetic compatibility (EMC), IEEE, Fort Lauderdale, 25–30 July 2010, FL, pp 847–852Google Scholar
  39. 39.
    Chiariello AG, Maffucci A, Miano G (2012) Electrical modeling of carbon nanotube vias. IEEE Trans Electromagn Compat 54(1):158–166CrossRefGoogle Scholar
  40. 40.
    Katti G, Stucchi M, Velenis D, De Meyer K, Dehaene W (2011) Temperature-dependent modeling and characterization of through-silicon via capacitance. IEEE Electron Device Lett 32(4):563–565CrossRefGoogle Scholar
  41. 41.
    Zhao WS, Wang XP, Yin WY (2011) Electrothermal effects in high density through silicon via (TSV) arrays. Prog Electromagn Res 115:223–242CrossRefGoogle Scholar
  42. 42.
    Chiariello AG, Maffucci A, Miano G (2013) Circuit models of carbon-based interconnects for nanopackaging. IEEE Trans Compon Packag Manuf Technol 3(11):1926–1937CrossRefGoogle Scholar
  43. 43.
    Zhao WS, Yin WY, Guo YX (2012) Electromagnetic compatibility-oriented study on through silicon single-walled carbon nanotube bundle via (TS-SWCNTBV) arrays. IEEE Trans Electromagn Compat 54(1):149–157CrossRefGoogle Scholar
  44. 44.
    Zhao WS, Yin WY (2014) Comparative study on multilayer graphene nanoribbon (MLGNR) interconnects. IEEE Trans Electromagn Compat 56(3):638–645CrossRefGoogle Scholar
  45. 45.
    Liu YF, Zhao WS, Yong Z, Fang Y, Yin WY (2014) Electrical modeling of three-dimensional carbon-based heterogeneous interconnects. IEEE Trans Nanotechnol 13(3):488–495CrossRefGoogle Scholar
  46. 46.
    Yin WY, Zhao WS, Webster J, (2013) Modeling and characterization of on-chip interconnects. In: Wiley encyclopedia of electrical and electronics engineering. Wiley 1–18Google Scholar
  47. 47.
    Sarkar D, Xu C, Li H, Banerjee K (2011) High-frequency behavior of graphene-based interconnects—part I: impedance modeling. IEEE Trans Electron Devices 58(3):843–852CrossRefGoogle Scholar
  48. 48.
    Khatami Y, Li H, Xu C, Banerjee K (2012) Metal-to-multilayer graphene contact—part II: analysis of contact resistance. IEEE Trans Electron Devices 59(9):2453–2460CrossRefGoogle Scholar
  49. 49.
    Mehta R, Chugh S, Chen Z (2015) Enhanced electrical and thermal conduction in graphene-encapsulated copper nanowires. Nano Lett 15(3):2024–2030CrossRefGoogle Scholar
  50. 50.
    Zhao WS, Wang DW, Wang G, Yin WY (2015) Electrical modeling of on-chip Cu-graphene heterogeneous interconnects. IEEE Electron Device Lett 36(1):74–76CrossRefGoogle Scholar
  51. 51.
    Zhao WS, Zhang R, Fang Y, Yin WY, Wang G, Kang K (2016) High-frequency modeling of Cu-graphene heterogeneous interconnects. Int J Numer Modell, 29(2): 157–165Google Scholar
  52. 52.
    Kang CG, Lim SK, Lee S, Lee SK, Cho C, Lee YG, Hwang HJ, Kim Y, Choi HJ, Choe SH, Ham MH, Lee BH (2013) Effects of multi-layer graphene capping on Cu interconnects. Nanotechnology 24:115707CrossRefGoogle Scholar
  53. 53.
    Yeh CH, Medina H, Lu CC, Huang KP, Liu Z, Suenaga K, Chiu PW (2014) Scalable graphite/copper bishell composite for high-performance interconnects. ACS Nano 8(1): 275–282CrossRefGoogle Scholar
  54. 54.
    Goli P, Ning H, Li X, Lu CY, Novoselov KS, Balandin AA (2014) Thermal properties of graphene-copper-graphene heterogeneous films. Nano Lett 14:1497–1503CrossRefGoogle Scholar
  55. 55.
    Subramaniam C, Yamada T, Kobashi K, Sekiguchi A, Futaba DN, Yumura M, Hata K (2013) One hundred fold increase in current carrying capacity in a carbon nanotube-copper composite. Nat Commun 4:2202CrossRefGoogle Scholar
  56. 56.
    Jordan MB, Feng Y, Burkett SL (2015) Development of seed layer for electrodeposition of copper on carbon nanotube bundles. J Vac Sci Technol B 33:021202CrossRefGoogle Scholar
  57. 57.
    Feng Y, Burkett SL (2015) Fabrication and electrical performance of through silicon via interconnects filled with a copper/carbon nanotube composite. J Vac Sci Technol B 33:022004CrossRefGoogle Scholar

Copyright information

© Springer International Publishing Switzerland 2017

Authors and Affiliations

  1. 1.College of Information Science and Electronic EngineeringZhejiang UniversityHangzhouChina
  2. 2.Key Lab of RF Circuits and Systems of Ministry of Education, Microelectronic CAD CenterHangzhou Dianzi UniversityHangzhouChina

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