Abstract
The diversity of applications for carbon nanotubes (CNTs) is rather remarkable. This is in part due to their remarkable range of physical and electronic properties [1, 2]. In addition to metallic CNTs which may serve as interconnects that may complement conventional bulk metal wires [3, 4], semiconducting CNTs are the ideal transistor channel material for an ultimately scaled high-performance and energy-efficient digital logic technology [2, 5]. Analysis for very large-scale integrated (VLSI) systems (modeled using an entire IBM Power 7 processor) reveals CNT field effect transistors (CNFETs) would provide an order of magnitude benefit in the energy-delay product (EDP, a measure of energy efficiency) over silicon CMOS [6–9].
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Notes
- 1.
Abundant-data: massive amounts of highly unstructured data, with little or no locality, often streamed in terabytes.
- 2.
2.5D integration refers to integration of several 2D chips or dies, which are mounted in a package in a single plane, for instance, over a silicon interposer.
- 3.
Conventional 3D integration refers to integration of several 2D chips or dies, which are mounted vertically over one-another, in different vertical planes.
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Acknowledgements
This work was supported in part by STARnet SONIC, the National Science Foundation, the Stanford SystemX Alliance, and the Hertz Fellowship and Stanford Graduate Fellowship for Max Shulaker. We acknowledge Gage Hills, Tony Wu, Rebecca Park, Gregory Pitner, Luckshitha Suriyasena Liyanage, and Professor Eric Pop of Stanford University for fruitful discussions and collaborations. Works by previous generations of former students have laid the foundation for the work described in this chapter.
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Shulaker, M.M., Wei, H., Mitra, S., Wong, HS.P. (2017). Carbon Nanotubes for Monolithic 3D ICs. In: Todri-Sanial, A., Dijon, J., Maffucci, A. (eds) Carbon Nanotubes for Interconnects. Springer, Cham. https://doi.org/10.1007/978-3-319-29746-0_11
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