Carbon Nanotubes for Monolithic 3D ICs

  • Max Marcel Shulaker
  • Hai Wei
  • Subhasish Mitra
  • H.-S. Philip WongEmail author


The diversity of applications for carbon nanotubes (CNTs) is rather remarkable. This is in part due to their remarkable range of physical and electronic properties [1, 2]. In addition to metallic CNTs which may serve as interconnects that may complement conventional bulk metal wires [3, 4], semiconducting CNTs are the ideal transistor channel material for an ultimately scaled high-performance and energy-efficient digital logic technology [2, 5]. Analysis for very large-scale integrated (VLSI) systems (modeled using an entire IBM Power 7 processor) reveals CNT field effect transistors (CNFETs) would provide an order of magnitude benefit in the energy-delay product (EDP, a measure of energy efficiency) over silicon CMOS [6–9].


Logic Gate Vertical Layer Layer Transfer Digital Logic Drain Contact 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.



This work was supported in part by STARnet SONIC, the National Science Foundation, the Stanford SystemX Alliance, and the Hertz Fellowship and Stanford Graduate Fellowship for Max Shulaker. We acknowledge Gage Hills, Tony Wu, Rebecca Park, Gregory Pitner, Luckshitha Suriyasena Liyanage, and Professor Eric Pop of Stanford University for fruitful discussions and collaborations. Works by previous generations of former students have laid the foundation for the work described in this chapter.


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Copyright information

© Springer International Publishing Switzerland 2017

Authors and Affiliations

  • Max Marcel Shulaker
    • 1
  • Hai Wei
    • 1
  • Subhasish Mitra
    • 1
  • H.-S. Philip Wong
    • 1
    Email author
  1. 1.Stanford UniversityStanfordUSA

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