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Nonvolatile Memory Computing System

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Design Exploration of Emerging Nano-scale Non-volatile Memory

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Abstract

The analysis of big-data at exascale (1018 bytes or flops) has introduced the emerging need to reexamine the existing hardware platform that can support memory-oriented computing. A big-data-driven application requires huge bandwidth with maintained low-power density. For example, web-searching application involves crawling, comparing, ranking, and paging of billions of web pages with extensive memory access. However, the current data-processing platform has well-known memory wall with limited accessing bandwidth but also large leakage power at advanced CMOS technology nodes. As such, a power-efficient memory-based design is highly desirable for future big-data processing. From memory design perspective, hybrid memory architecture can be built to exploit the strengths and avoid the weaknesses of different memory technologies. From logic computation perspective, nonvolatile memory based computing is favored to achieve power-efficient computing with high parallelism. In this chapter, the NVM system designs have been explored as potential solutions for future big-data computing platform.

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Authors and Affiliations

  1. School of EEE, Nanyang Technological University, Singapore, Singapore

    Hao Yu & Yuhao Wang

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  1. Hao Yu
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  2. Yuhao Wang
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Yu, H., Wang, Y. (2014). Nonvolatile Memory Computing System. In: Design Exploration of Emerging Nano-scale Non-volatile Memory. Springer, New York, NY. https://doi.org/10.1007/978-1-4939-0551-5_5

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  • DOI: https://doi.org/10.1007/978-1-4939-0551-5_5

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  • Publisher Name: Springer, New York, NY

  • Print ISBN: 978-1-4939-0550-8

  • Online ISBN: 978-1-4939-0551-5

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