Abstract
The increase in the number of components on a single chip has forced the designers and manufacturers to consider carefully, the issues related to the reliability, yield and effective silicon area utilization. Several reconfiguration schemes have been suggested in the literature to make a chip fault-tolerant by adding redundancy at various logical and physical levels.
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© 1989 Plenum Press, New York
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Jain, A., Rajski, J. (1989). Probabilistic Analysis of Yield and Area Utilization of Reconfigurable Rectangular Processor Arrays. In: Koren, I. (eds) Defect and Fault Tolerance in VLSI Systems. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-6799-8_24
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DOI: https://doi.org/10.1007/978-1-4615-6799-8_24
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