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I DDQ Testing as a Component of a Test Suite: The Need for Several Fault Coverage Metrics

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IDDQ Testing of VLSI Circuits

Abstract

This article is concerned with the role of I DDQ testing, in conjunction with other types of tests, in achieving high quality. In particular, the argument is made that rather than use a single fault coverage, it is better to obtain a number of different coverages, for different types of faults. To demonstrate the need for increasingly stringent fault coverage requirements, an analysis is given of the relationship between quality, fault coverage and chip area. This analysis shows that as chip area increases, fault coverage must also increase to maintain constant quality levels. Data are then presented from a production part tested with Iddq scan, timing and functional tests. To realistically fault grade I DDQ tests, three different coverage metrics are considered. The data show differences in tester failures compared to these coverage metrics, depending on whether one uses total Iddq failures (parts which fail Iddq regardless of whether they fail other tests as well) or unique IDdq failures (parts which fail only Iddq). The relative effectiveness of the different components of the full test suite are analyzed and it is demonstrated that no component can be removed without suffering a reduction in quality.

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© 1992 Springer Science+Business Media Dordrecht

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Maxwell, P.C., Aitken, R.C. (1992). I DDQ Testing as a Component of a Test Suite: The Need for Several Fault Coverage Metrics. In: Gulati, R.K., Hawkins, C.F. (eds) IDDQ Testing of VLSI Circuits. Springer, Boston, MA. https://doi.org/10.1007/978-1-4615-3146-3_2

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  • DOI: https://doi.org/10.1007/978-1-4615-3146-3_2

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4613-6377-4

  • Online ISBN: 978-1-4615-3146-3

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