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Simulation of BTI-Related Time-Dependent Variability in CMOS Circuits

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Bias Temperature Instability for Devices and Circuits

Abstract

The correct evaluation of BTI impact on the circuit performance and reliability is a major concern in current technologies. Since BTI in ultrascaled devices is a stochastic mechanism and aging must be evaluated under the actual operation conditions of devices in the circuit, SPICE and Monte Carlo simulations are customary combined with this purpose. The key point in these simulations is the correct description of the BTI effects in the device and their inclusion in circuit simulators. In this subchapter, the different adopted approaches are presented, pointing out their pros and cons, and illustrated with examples of BTI effects on several analog and digital circuits.

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Acknowledgments

This work was partially supported by the Spanish MINECO (TEC2010-16126) and by the Generalitat de Catalunya (2009 SGR-783).

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Authors and Affiliations

  1. Dept. Enginyeria Electrònica, Universitat Autònoma de Barcelona (UAB), Escola d’Enginyeria, Edifici Q, 08193, Bellaterra, Spain

    Javier Martin-Martinez, Rosana Rodriguez & Montse Nafria

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  1. Javier Martin-Martinez
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  2. Rosana Rodriguez
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  3. Montse Nafria
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Correspondence to Javier Martin-Martinez .

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  1. Institute for Microelectronics, Technische Universität Wien, Wien, Austria

    Tibor Grasser

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Martin-Martinez, J., Rodriguez, R., Nafria, M. (2014). Simulation of BTI-Related Time-Dependent Variability in CMOS Circuits. In: Grasser, T. (eds) Bias Temperature Instability for Devices and Circuits. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-7909-3_30

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  • DOI: https://doi.org/10.1007/978-1-4614-7909-3_30

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