Abstract
In this chapter, we aim to introduce the global context of the book. While the microelectronics industry is still lead by the scaling, we point out its limits and highlights some novel way coming from the nanotechnologies. In order to provide an efficient evaluation strategy of the different ways, we present the global methodology used in the remaining of the book.
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Notes
- 1.
This term was first coined at the 100 k transistor mark. Other terms were later proposed (e.g. ULSI) to reflect the continually increasing complexity of integrated circuits , but remains the term of choice within the community.
- 2.
High Threshold Voltage (Vt).
- 3.
Low Threshold Voltage (Vt).
References
J. Bardeen, W.H. Brattain, Three-electrode circuit element utilizing semiconductor materials, US Patent No. 2524035 (1948)
D. Kahng, Electric field controlled semiconductor device, US Patent No. 2524035 (1960)
G.E. Moore, Cramming more components onto integrated circuits, Electronics 38(8), 114–117 (1965)
H. Iwai, Roadmap for 22 nm and beyond (Invited Paper). Microelectron. Eng. 86(7–9), 1520–1528 (2009)
T. Hoffmann, G. Doorribos, I. Ferain, N. Collaert, P. Zimmerman, M. Goodwin, R. Rooyackers, A. Kottantharayil, Y. Yim, A. Dixit, K. De Meyer, M. Jurczak, S. Biesemans, GIDL (gate-induced drain leakage) and parasitic schottky barrier leakage elimination in aggressively scaled HfO2/TiN FinFET devices, IEDM Tech. Dig. 725–728 (Dec 2005)
T. Hori, Drain-structure design for reduced band-to-band and band-todefect tunneling leakage, VLSI Technol. Symp. Tech. Dig. 69–70 (June 1990)
R.H. Dennard, F.H. Gaensslen, H.-N. Yu, V.L. Rideout, E. Bassous, A.R. Leblanc, Design of ion-implanted MOSFET’s with very small physical dimensions. IEEE J. Solid State Circuits 9(5), 256–268 (1974)
System Drivers Chapter, Updated Edition, International Technology Roadmap for Semiconductors (2010), http://www.itrs.net/Links/2010ITRS/Home2010.htm
Design Chapter, Updated Edition, International Technology Roadmap for Semiconductors (2010), http://www.itrs.net/Links/2010ITRS/Home2010.htm
Executive Summary, Updated Edition, International Technology Roadmap for Semiconductors (2010), http://www.itrs.net/Links/2010ITRS/Home2010.htm
Emerging Research Devices and Materials Chapters, Updated Editions, International Technology Roadmap for Semiconductors (2010), http://www.itrs.net/Links/2010ITRS/Home2010.htm
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Gaillardon, PE., O’Connor, I., Clermidy, F. (2012). Introduction. In: Disruptive Logic Architectures and Technologies. Springer, New York, NY. https://doi.org/10.1007/978-1-4614-3058-2_1
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DOI: https://doi.org/10.1007/978-1-4614-3058-2_1
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