NoC Reuse for SoC Modular Testing

Abstract

In this chapter we cover the first proposed test approaches that reuse the NoC as Test Access Mechanism (TAM) in a core-based system. First, the basic reuse strategy is presented, including the very few modifications implemented in the network interface, and the definition of the test packets to make the test possible. Then, two test scheduling approaches (preemptive and non-preemptive) are discussed. These basic reuse strategies focus on the definition of specific test scheduling algorithms, since the TAM (NoC) architecture and transport capacity are given. The reuse model and the scheduling algorithms presented here assume a stream-like communication can be established, through the NoC, between the cores under test and the external test sources and sinks. This assumption implies a NoC with guaranteed fixed bandwidth and latency. Other reuse models (use of different test packet models and BE NoCs) are discussed in Chap. 5.