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Predicting the Performance of Shared Multiprocessor Caches

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Cache and Interconnect Architectures in Multiprocessors

Abstract

We investigate the performance of shared caches in a shared-memory multiprocessor executing parallel programs, and formulate simple models for estimating the load placed on the bus by such a shared cache. We analyze three parallel program traces to quantify the amount of sharing that takes place during program execution. These results indicate that shared caches can substantially reduce the load placed on a bus by a large number of processors.

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© 1990 Kluwer Academic Publishers

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Goosen, H.A., Cheriton, D.R. (1990). Predicting the Performance of Shared Multiprocessor Caches. In: Dubois, M., Thakkar, S.S. (eds) Cache and Interconnect Architectures in Multiprocessors. Springer, Boston, MA. https://doi.org/10.1007/978-1-4613-1537-7_8

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  • DOI: https://doi.org/10.1007/978-1-4613-1537-7_8

  • Publisher Name: Springer, Boston, MA

  • Print ISBN: 978-1-4612-8824-4

  • Online ISBN: 978-1-4613-1537-7

  • eBook Packages: Springer Book Archive

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