Abstract
Despite decades of research in industry and academia, parallel algorithm design largely remains an art form. The systematic steps in the Parallel Algorithm Synthesis Procedure provide algorithm designers with a framework for mastering this art form. The case studies demonstrate that the synthesis procedure is a road map for designing reusable building blocks of adaptable, scalable software components from which high performance signal processing applications can be constructed. The semi-systematic process for introducing parameters to control the partitioning and scheduling of computation and communication allows algorithm designers to simultaneously reap the benefits of efficiency and portability. The parameters are essentially a convenient representation of a large class of algorithms. They allow the algorithm designer to optimize over a large class of algorithms, enhancing both portability and efficiency.
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© 2003 Springer Science+Business Media New York
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Dunn, I.N., Meyer, G.G.L. (2003). Conclusion. In: A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures. Series in Computer Science. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-8650-4_8
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DOI: https://doi.org/10.1007/978-1-4419-8650-4_8
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4613-4658-6
Online ISBN: 978-1-4419-8650-4
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