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  • © 2003

A Parallel Algorithm Synthesis Procedure for High-Performance Computer Architectures

Part of the book series: Series in Computer Science (SCS)

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Table of contents (8 chapters)

  1. Front Matter

    Pages i-xi
  2. Introduction

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 1-3
  3. Parallel Computing

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 5-12
  4. Parallel Algorithm Synthesis Procedure

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 13-27
  5. Review of Matrix Factorization

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 29-40
  6. Case Study 1: Parallel Fast Givens QR Factorization

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 41-73
  7. Case Study 2: Parallel Compact WY QR Factorization

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 75-87
  8. Case Study 3: Parallel Matrix Bidiagonalization

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 89-99
  9. Conclusion

    • Ian N. Dunn, Gerard G. L. Meyer
    Pages 101-102
  10. Back Matter

    Pages 103-108

About this book

Despite five decades of research, parallel computing remains an exotic, frontier technology on the fringes of mainstream computing. Its much-heralded triumph over sequential computing has yet to materialize. This is in spite of the fact that the processing needs of many signal processing applications continue to eclipse the capabilities of sequential computing. The culprit is largely the software development environment. Fundamental shortcomings in the development environment of many parallel computer architectures thwart the adoption of parallel computing. Foremost, parallel computing has no unifying model to accurately predict the execution time of algorithms on parallel architectures. Cost and scarce programming resources prohibit deploying multiple algorithms and partitioning strategies in an attempt to find the fastest solution. As a consequence, algorithm design is largely an intuitive art form dominated by practitioners who specialize in a particular computer architecture. This, coupled with the fact that parallel computer architectures rarely last more than a couple of years, makes for a complex and challenging design environment.

To navigate this environment, algorithm designers need a road map, a detailed procedure they can use to efficiently develop high performance, portable parallel algorithms. The focus of this book is to draw such a road map. The Parallel Algorithm Synthesis Procedure can be used to design reusable building blocks of adaptable, scalable software modules from which high performance signal processing applications can be constructed. The hallmark of the procedure is a semi-systematic process for introducing parameters to control the partitioning and scheduling of computation and communication. This facilitates the tailoring of software modules to exploit different configurations of multiple processors, multiple floating-point units, and hierarchical memories. To showcase the efficacy of this procedure, the book presents threecase studies requiring various degrees of optimization for parallel execution.

Authors and Affiliations

  • Mercury Computer Systems, Inc., Chelmsford, USA

    Ian N. Dunn

  • Johns Hopkins University, Baltimore, USA

    Gerard G. L. Meyer

Bibliographic Information

Buy it now

Buying options

eBook USD 84.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book USD 109.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book USD 109.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Other ways to access