Abstract
Following integer and fractional motion estimation, motion compensation (MC) is the third stage in H.264/AVC interframe prediction (P or B frame). After the motion estimator finds motion vectors and related information for each current macroblock (MB), the motion compensator generates compensated MBs from reference frames. Due to quarter-pixel-precision and variable-block-size motion estimation supported in H.264, motion compensation also needs to generate half- or quarter-pixels for MB compensation. Therefore, motion compensation also has high computational complexity and dominates the data traffic on DRAM. Current VLSI designs for MC usually focus on reducing memory traffic or increasing interpolator throughput. In this chapter, we will introduce several key points of VLSI implementation for motion compensation.
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Lin, YL.S., Kao, CY., Kuo, HC., Chen, JW. (2010). Motion Compensation. In: VLSI Design for Video Coding. Springer, Boston, MA. https://doi.org/10.1007/978-1-4419-0959-6_5
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DOI: https://doi.org/10.1007/978-1-4419-0959-6_5
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