Authors:
- Presents state-of-the-art VLSI architectural design and chip implementation for high definition H.264/AVC video encoding
- Employs massively parallel processing to deliver up to 33 million pixels, with efficient design that can be prototyped via FPGA
- Every subsystem is presented from standard specification, algorithmic description, design considerations, timing planning, block diagram to test-bench verification
- Verilog RTL codes and testbenches available for download
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Table of contents (9 chapters)
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Front Matter
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Back Matter
About this book
High definition video requires substantial compression in order to be transmitted or stored economically. Advances in video coding standards from MPEG-1, MPEG-2, MPEG-4 to H.264/AVC have provided ever increasing coding efficiency, at the expense of great computational complexity which can only be delivered through massively parallel processing.
This book will present VLSI architectural design and chip implementation for high definition H.264/AVC video encoding, using a state-of-the-art video application, with complete VLSI prototype, via FPGA/ASIC. It will serve as an invaluable reference for anyone interested in VLSI design and high-level (EDA) synthesis for video.
Reviews
From the reviews:
“An academic project of developing an application-specific VLSI architecture for H.264/AVC video encoding is described in the book. … The book addresses to researchers, educators, and developers in video coding systems, hardware accelerators for image/video processing, and high-level synthesis of VLSI. Especially, those who are interested in state-of-the-art parallel architecture and implementation of intra prediction, integer motion estimation, fractional motion estimation, discrete cosine transform, context-adaptive binary arithmetic coding, and deblocking filter will find design ideas from this book.” (Eleonor Ciurea, Zentralblatt MATH, Vol. 1191, 2010)Authors and Affiliations
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Dept. Computer Science, National Tsing Hua University, HsinChu, Taiwan R.O.C.
Youn-Long Steve Lin, Chao-Yang Kao, Hung-Chih Kuo, Jian-Wen Chen
Bibliographic Information
Book Title: VLSI Design for Video Coding
Book Subtitle: H.264/AVC Encoding from Standard Specification to Chip
Authors: Youn-Long Steve Lin, Chao-Yang Kao, Hung-Chih Kuo, Jian-Wen Chen
DOI: https://doi.org/10.1007/978-1-4419-0959-6
Publisher: Springer New York, NY
eBook Packages: Engineering, Engineering (R0)
Copyright Information: Springer-Verlag US 2010
Hardcover ISBN: 978-1-4419-0958-9Published: 12 February 2010
Softcover ISBN: 978-1-4899-8382-4Published: 05 September 2014
eBook ISBN: 978-1-4419-0959-6Published: 29 December 2009
Edition Number: 1
Number of Pages: XI, 176
Topics: Circuits and Systems, Computer-Aided Engineering (CAD, CAE) and Design
Industry Sectors: Aerospace, Automotive, Electronics, Energy, Utilities & Environment, Engineering, IT & Software, Oil, Gas & Geosciences, Telecommunications