Design and Analysis of Fault-Tolerant Molecular Computing Systems

  • D. Bhaduri
  • S. K. Shukla
  • H. Quinn
  • P. Graham
  • M. Gokhale
Part of the Frontiers in Electronic Testing book series (FRET, volume 37)

As electronics enters the nanoscopic realm, patterning and fabrication costs to manufacture nanoscale CMOS chips are expected to increase exponentially. Hence, researchers are looking at technologies that can be more viable for the miniaturization of electronics than conventional technologies that require almost perfect control over lithography, etching and other processes. One of the technologies that the microelectronics community has been investigating is chemical self-assembly of devices from elementary and identical molecular units by controlled deposition of molecular monolayers on the substrates, a technology that has given birth to molecular electronics [28].


Failure Probability Discrete Time Markov Chain Transient Fault Structural Redundancy Triple Modular Redundancy 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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© Springer Science+Business Media, LLC 2008

Authors and Affiliations

  • D. Bhaduri
  • S. K. Shukla
  • H. Quinn
  • P. Graham
  • M. Gokhale

There are no affiliations available

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