Towards Nanoelectronics Processor Architectures

  • W. Rao
  • A. Orailoglu
  • R. Karri
Part of the Frontiers in Electronic Testing book series (FRET, volume 37)

CMOS technology has moved beyond 80 nanometers in scale, and according to the International Technology Roadmap for Semiconductors (ITRS), is projected to reach beyond 22 nanometers in the next several years [1, 2]. At nanometer scale, CMOS devices start to meet the physical limits and further shrinking in the CMOS feature sizes is checkmated by the insurmountable barriers of quantum effects, leakage current and power consumption.


Parent Instruction Hardware Resource Fault Rate Transient Fault Speculative Branch 
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Copyright information

© Springer Science+Business Media, LLC 2008

Authors and Affiliations

  • W. Rao
    • 1
  • A. Orailoglu
    • 1
  • R. Karri
  1. 1.University of CaliforniaSan Diego

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