Abstract
The design of a CMOS piezoresistive pressure sensor with mixed-signal circuitry to provide a digital output is described. The on-chip sensor is a monolithic silicon etched diaphragm, built via post-processing, with the strain gauge composed of diffused resistors in an active Wheatstone bridge configuration. The amplifier’s bridge is chopped for efficient low frequency noise and amplifier offset cancellations. The A-to-D converter is based on a second-order ΔΣ modulator including 6 bits DAC units for sensor offset calibration. The circuit has temperature compensation of both full output scale and offset. Overall system resolution is 12 bits, corresponding to 72dB dynamic range, while the pressure range is 0 to 50kPa. Pulsed mode operation allows for low power dissipation (<1mW) at 3V supply voltage. This device is intended to be used in biomedical applications such as non-invasive blood pressure measurement and diagnostics.
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© 1997 Springer Science+Business Media Dordrecht
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Chavez, F., Olmos, A., Nogueira, R.R.B., Charry, E., Azeredo Leme, C. (1997). An architecture for a 12 bits, low power integrated CMOS pressure sensor with thermal compensation. In: Reis, R., Claesen, L. (eds) VLSI: Integrated Systems on Silicon. IFIP — The International Federation for Information Processing. Springer, Boston, MA. https://doi.org/10.1007/978-0-387-35311-1_4
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DOI: https://doi.org/10.1007/978-0-387-35311-1_4
Publisher Name: Springer, Boston, MA
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