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The XC620ODS development system

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Field-Programmable Logic and Applications (FPL 1997)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1304))

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Abstract

The XC620ODS is a development system for reconfigurable logic design. The hardware features an XC6216 reconfigurable logic device, a 33 MHz PCI bus interface and up to 2 MB of on-board SRAM. Support software including interface libraries in both C++ and Java, as well as the WebScope graphical debug interface and sample applications are also discussed.

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References

  1. Gordon Brebner. A virtual hardware operating system for the Xilinx XC6200. In Reiner W. Hartenstein and Manfred Glesner, editors, Field-Programmable Logic: Smart Applications, New Paradigms and Compilers, pages 327–336, 1996. Proceedings of the 6th International Workshop on Field-Programmable Logic and Applications, FPL 96. Lecture Notes in Computer Science 1142.

    Google Scholar 

  2. Gordon Brebner and John Gray. Use of reconfigurability in variable-length code detection at video rates. In Will Moore and Wayne Luk, editors, Field-Programmable Logic and Applications, pages 429–438, 1996. Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications, FPL 95. Lecture Notes in Computer Science 972.

    Google Scholar 

  3. Stephen Churcher, Tom Kean, and Bill Wilkie. The XC6200 FastMap TM processor interface. In Will Moore and Wayne Luk, editors, Field-Programmable Logic and Applications, pages 36–43, 1996. Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications, FPL 95. Lecture Notes in Computer Science 972.

    Google Scholar 

  4. J. P. Heron and R. F. Woods. Architectural strategies for implementing an image processing algorithm on XC6000 FPGA. In Reiner W. Hartenstein and Manfred Glesner, editors, Field-Programmable Logic: Smart Applications, New Paradigms and Compilers, pages 317–326, 1996. Proceedings of the 6th International Workshop on Field-Programmable Logic and Applications, FPL 96. Lecture Notes in Computer Science 1142.

    Google Scholar 

  5. Tom Kean, Bernie New, and Bob Slous. A constant coefficient multiplier for the XC6200. In Reiner W. Hartenstein and Manfred Glesner, editors, Field-Programmable Logic: Smart Applications, New Paradigms and Compilers, pages 230–236, 1996. Proceedings of the 6th International Workshop on Field-Programmable Logic and Applications, FPL 96. Lecture Notes in Computer Science 1142.

    Google Scholar 

  6. Stefan H.-M. Ludwig. Design of a coprocessor board using Xilinx's XC6200 FPGA — an experience report. In Reiner W. Hartenstein and Manfred Glesner, editors, Field-Programmable Logic: Smart Applications, New Paradigms and Compilers, pages 77–86, 1996. Proceedings of the 6th International Workshop on Field-Programmable Logic and Applications, FPL 96. Lecture Notes in Computer Science 1142.

    Google Scholar 

  7. W. Luk, S. Guo, N. Shirazi, and N. Zhuang. A framework for developing parameterized FPGA libraries. In Reiner W. Hartenstein and Manfred Glesner, editors, Field-Programmable Logic: Smart Applications, New Paradigms and Compilers, pages 24–33, 1996. Proceedings of the 6th International Workshop on Field-Programmable Logic and Applications, FPL 96. Lecture Notes in Computer Science 1142.

    Google Scholar 

  8. Wayne Luk, Nabeel Shirazi, and Peter Y. K. Cheung. Modelling and optimising run-time reconfigurable systems. In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 167–176, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

    Google Scholar 

  9. Edward Solari and George Willse. PCI Hardware and Software. Annabooks, 11848 Bernardo Plaza Court, Suite 110, San Diego, CA 92128 (USA), 1994.

    Google Scholar 

  10. R. Woods, A. Cassidy, and J. Gray.Architectures for field programmable gate arrays: A case study.In Kenneth L. Pocek and Jeffrey Arnold, editors, IEEE Symposium on FPGAs for Custom Computing Machines, pages 2–9, Los Alamitos, CA, April 1996. IEEE Computer Society Press.

    Google Scholar 

  11. Xilinx, Inc. The Programmable Logic Data Book, 1996.

    Google Scholar 

  12. Xilinx, Inc. XC6200 Development System, 1997.

    Google Scholar 

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Author information

Authors and Affiliations

  1. Xilinx Development Corporation, 52 Mortonhall Gate, EH16 6TJ, Edinburgh, Scotland

    Stuart Nisbet

  2. Xilinx Inc., 2100 Logic Drive, 95124, San Jose, CA, USA

    Steven A. Guccione

Authors
  1. Stuart Nisbet
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  2. Steven A. Guccione
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Editor information

Wayne Luk Peter Y. K. Cheung Manfred Glesner

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© 1997 Springer-Verlag Berlin Heidelberg

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Nisbet, S., Guccione, S.A. (1997). The XC620ODS development system. In: Luk, W., Cheung, P.Y.K., Glesner, M. (eds) Field-Programmable Logic and Applications. FPL 1997. Lecture Notes in Computer Science, vol 1304. Springer, Berlin, Heidelberg. https://doi.org/10.1007/3-540-63465-7_211

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  • DOI: https://doi.org/10.1007/3-540-63465-7_211

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  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-63465-2

  • Online ISBN: 978-3-540-69557-8

  • eBook Packages: Springer Book Archive

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