This book constitutes the refereed proceedings of the 7th International Workshop on Field Programmable Logic and Applications, FPL '97, held in London, UK, in September 1997. The 51 revised full papers in the volume were carefully selected from a large number of high-quality papers. The book is divided into sections on devices and architectures, devices and systems, reconfiguration, design tools, custom computing and codesign, signal processing, image and video processing, sensors and graphics, color and robotics, and applications.

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Bibliographic Information

Book Title: Field Programmable Logic and Applications
Book Subtitle: 7th International Workshop, FPL '97, London, UK, September, 1-3, 1997, Proceedings.
Editors: Wayne Luk, Peter Y. K. Cheung, Manfred Glesner
Series Title: Lecture Notes in Computer Science
DOI: https://doi.org/10.1007/3-540-63465-7
Publisher: Springer Berlin, Heidelberg
eBook Packages: Springer Book Archive
Copyright Information: Springer-Verlag Berlin Heidelberg 1997
Softcover ISBN: 978-3-540-63465-2Published: 20 August 1997
eBook ISBN: 978-3-540-69557-8Published: 13 September 2005
Series ISSN: 0302-9743
Series E-ISSN: 1611-3349
Edition Number: 1
Number of Pages: XII, 512
Topics: Computer Engineering, Computer System Implementation, Programming Languages, Compilers, Interpreters, Computer Hardware, Complexity, Mathematical Logic and Formal Languages
Industry Sectors: Aerospace, Biotechnology, Electronics, Energy, Utilities & Environment, IT & Software, Telecommunications

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Table of contents (51 papers)

Front Matter

Multicontext dynamic reconfiguration and real-time probing on a novel mixed signal programmable device with on-chip microprocessor

CAD-oriented FPGA and dedicated CAD system for telecommunications

Rothko: A three dimensional FPGA architecture, its fabrication, and design tools

Extending dynamic circuit switching to meet the challenges of new FPGA architectures

Performance evaluation of a full speed PCI initiator and target subsystem using FPGAs

Implementation of pipelined multipliers on Xilinx FPGAs

The XC620ODS development system

Thermal monitoring on FPGAs using ring-oscillators

A reconfigurable approach to low cost media processing

Riley-2: A flexible platform for codesign and dynamic reconfigurable computing research

Stream synthesis for a wormhole run-time reconfigurable platform

Pipeline morphing and virtual pipelines

Parallel graph colouring using FPGAs

Run-time compaction of FPGA designs

Partial reconfiguration of FPGA mapped designs with applications to fault tolerance and yield enhancement

A case study of partially evaluated hardware circuits: Key-specific DES

Run-time parameterised circuits for the Xilinx XC6200

Automatic identification of swappable logic units in XC6200 circuitry

Towards an expert system for a priori estimation of reconfiguration latency in dynamically reconfigurable logic

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