Estimating Energy Consumption for an MPSoC Architectural Exploration

Abstract

Early energy estimation is increasingly important in MultiProcessor System-On-Chip (MPSoC) design. Applying traditional approaches, which consist in delaying the estimation until the architectural layout has been produced, is inefficient and prevents the rapid exploration of alternative architectures. In this paper, we present a framework for architectural exploration as part of MPSoC design. Our framework allows configurations that offer a good performance/energy tradeoffs to be found early in the design flow. The hardware components, described at the Cycle-Accurate Bit-Accurate (CABA) level of SystemC, were taken from the SoCLib library. For each component in the library, we developed an energy model using both physical measurements and analytical models of energy consumption. These models indicate a good accuracy/speed tradeoffs. Plugging the energy models into the SoCLib architectural simulator makes it easy to estimate the application’s performance and energy consumption. The effectiveness of our method is illustrated through design space exploration (DSE) for a parallel signal processing application.