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Architecture of Computing Systems - ARCS 2006

19th International Conference, Frankfurt/Main, Germany, March 13-16, 2006, Proceedings

  • Conference proceedings
  • © 2006

Overview

Editors:
  1. Werner Grass

    1. University of Passau, Passau, Germany

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  2. Bernhard Sick

    1. Faculty of Computer Science and Mathematics – Institute of Computer Architectures, University of Passau, Passau, Germany

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    You can also search for this editor in PubMed   Google Scholar

  3. Klaus Waldschmidt

    1. University of Frankfurt/Main, Frankfurt, Germany

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Part of the book series: Lecture Notes in Computer Science (LNCS, volume 3894)

Part of the book sub series: Theoretical Computer Science and General Issues (LNTCS)

Included in the following conference series:

Conference proceedings info: ARCS 2006.

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Table of contents (34 papers)

  1. Front Matter

    Download chapter PDF

  2. Invited and Keynote Papers

    1. Life-Inspired Systems and Their Quality-Driven Design

      • Lech Jóźwiak
      Pages 1-16

    2. The Robustness of Resource Allocations in Parallel and Distributed Computing Systems

      • Vladimir Shestak, Howard Jay Siegel, Anthony A. Maciejewski, Shoukat Ali
      Pages 17-30

  3. Pervasive Computing

    1. FingerMouse – A Button Size Visual Hand Tracking and Segmentation Device

      • Patrick de la Hamette, Gerhard Tröster
      Pages 31-41

    2. An Ad-Hoc Wireless Network Architecture for Face-to-Face Mobile Collaborative Applications

      • Gustavo Zurita, Miguel Nussbaum
      Pages 42-55

    3. Background Data Acquisition and Carrying: The BlueDACS Project

      • Thomas Wieland, Martin Fenne, Benjamin Stöcker
      Pages 56-68

    4. Prototypical Implementation of Location-Aware Services Based on Super-Distributed RFID Tags

      • Jürgen Bohn
      Pages 69-83

    5. Combined Resource and Context Model for QoS-Aware Mobile Middleware

      • Sten Lundesgaard Amundsen, Frank Eliassen
      Pages 84-98

    6. Distributed Modular Toolbox for Multi-modal Context Recognition

      • David Bannach, Kai Kunze, Paul Lukowicz, Oliver Amft
      Pages 99-113

  4. Memory Systems

    1. Dynamic Dictionary-Based Data Compression for Level-1 Caches

      • Georgios Keramidas, Konstantinos Aisopos, Stefanos Kaxiras
      Pages 114-129

    2. A Case for Dual-Mapping One-Way Caches

      • Arul Sandeep Gade, Yul Chu
      Pages 130-144

    3. Cache Write-Back Schemes for Embedded Destructive-Read DRAM

      • Haakon Dybdahl, Marius Grannæs, Lasse Natvig
      Pages 145-159

    4. A Processor Architecture with Effective Memory System for Sort-Last Parallel Rendering

      • Woo-Chan Park, Duk-Ki Yoon, Kil-Whan Lee, Il-San Kim, Kyung-Su Kim, Won-Jong Lee et al.
      Pages 160-175

  5. Architectures

    1. Controller Synthesis for Mapping Partitioned Programs on Array Architectures

      • Hritam Dutta, Frank Hannig, Jürgen Teich
      Pages 176-190

    2. M2E: A Multiple-Input, Multiple-Output Function Extension for RISC-Based Extensible Processors

      • Xiaoyong Chen, Douglas L. Maskell
      Pages 191-201

    3. An Operating System Infrastructure for Fault-Tolerant Reconfigurable Networks

      • Dirk Koch, Thilo Streichert, Steffen Dittrich, Christian Strengert, Christian D. Haubelt, Jürgen Teich
      Pages 202-216

    4. Architectural Tradeoffs in Wearable Systems

      • Nagendra Bhargava Bharatula, Urs Anliker, Paul Lukowicz, Gerhard Tröster
      Pages 217-231

  6. Multiprocessing

    1. Do Trace Cache, Value Prediction and Prefetching Improve SMT Throughput?

      • Chen-Yong Cher, Il Park, T. N. VijayKumar
      Pages 232-251

    2. Scalable and Partitionable Asynchronous Arbiter for Micro-threaded Chip Multiprocessors

      • Nabil Hasasneh, Ian Bell, Chris Jesshope
      Pages 252-267

    3. GigaNetIC – A Scalable Embedded On-Chip Multiprocessor Architecture for Network Applications

      • Jörg-Christian Niemann, Christoph Puttmann, Mario Porrmann, Ulrich Rückert
      Pages 268-282
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Keywords

About this book

Technological progress is one of the driving forces behind the dramatic devel- mentofcomputersystemarchitecturesoverthe pastthreedecades.Eventhough it is quite clear that this development cannot only be measured by the ma- mum number of components on a chip, Moore’s Law may be and is often taken as a simple measure for the non-braked growth of computational power over the years. The more components are realizable on a chip, the more innovative and unconventional ideas can be realized by system architects. As a result, research in computer system architectures is more exciting than ever before. This book coversthe trends that shape the ?eld of computer system archit- tures.Thefundamenataltrade-o?inthedesignofcomputing systemsis between ?exibility, performance,powerconsumption, andchip area.The full exploitation of future silicon capacity requires new architecture approaches and new design paradigms such as multiple computers on a single chip, recon?gurable processor arrays, extensible processor architectures, and embedded memory technologies. For a successful use in practical applications, it is not enough to solve the ha- wareproblemsbutalsotodevelopplatformsthatprovidesoftwareinfrastructure and support e?ective programming. A quantum jump in complexity is achieved by embedded computing systems with an unprecedented level of connectivity linking together a growing n- ber of physical devices through networks. Embedded systems will become more and more pervasive as the component technologies become smaller, faster, and cheaper. Their complexity arises not only from the large number of components but also from a lack of determinism and a continual evolution of these systems.

Editors and Affiliations

  • University of Passau, Passau, Germany

    Werner Grass

  • Faculty of Computer Science and Mathematics – Institute of Computer Architectures, University of Passau, Passau, Germany

    Bernhard Sick

  • University of Frankfurt/Main, Frankfurt, Germany

    Klaus Waldschmidt

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