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References
D. Josephson, “The Manic Depression of Microprocessor Debug”, Proc. IEEE International Test Conf., pp. 657-663, 2002.
K. Baker, J. V. Beers, “Shmoo Plotting: The Black Art of IC Testing”, IEEE Design and Test of Computers, Vol. 14, No. 3, pp. 90-97, July/September 1997.
J. Bockhaus, R. Bhatia, C. M. Ramsey, J. Butler, D. Ljung, “Electrical Verification of the HP PA8000 Processor”, Hewlett Packard Journal, pp. 32-39, August 1997.
H. Balchandran, et al., “Facilitating Rapid First Silicon Debug”, Proc. IEEE International Test Conf., pp. 628-637, 2002.
B. Vermeulen, et al., “Core-based Scan Architecture for Silicon Debug”, Proc. IEEE International Test Conf., pp. 638-647, 2002.
X. Gu, et el., “Reusing DFT Logic for Functional and Silicon Debugging Test”, Proc. IEEE International Test Conf., pp. 648-656, 2002.
C. Pyron, et al., “Silicon Symptoms to Solutions: Applying Design-for-debug Techniques”, Proc. IEEE International Test Conf., pp. 664-672, 2002.
T. Litt, “Support for Debugging in the Alpha 21364 Microprocessor”, Proc. IEEE International Test Conf., pp. 584-589, 2002.
D. Josephson, et al., “Debug Methodology for the McKinley Processor”, Proc. IEEE International Test Conf., pp. 451-460, 2001.
T. Wood, “The Test and Debug Features of the AMD-K7 ™ Microprocessor”, Proc. IEEE International Test Conf., pp. 130-136, 1999.
A. Kinra, et al., “Diagnostic Techniques for the UltraSPARC ™ Microprocessors”, Proc. IEEE International Test Conf., pp. 480-486, 1998.
A. Carbine, D. Feltham, “Pentium® Pro Processor Design for Test and Debug”, Proc. IEEE International Test Conf., pp. 298-299, 1997.
M. Bass, et al., “Design Methodologies for the PA7100LC Microprocessor”, Hewlett Packard Journal, pp. 23-35, April 1995.
J. Stinson, S. Rusu, “A 1. 5GHz third generation Itanium 2 processor”, Proc. of Design Automation Conf., pp. 708, June 2003.
M. Paniccia, et al., “Novel Optical Probing Techniques for Flip Chip Packaged Microprocessors”, Proc. IEEE International Test Conf., pp. 740-747, 1998.
J. Tsang, et al., “Picosecond imaging circuit analysis”, IBM Journal of Research and Development, Vol. 44, No. 4, 2000, pp. 583-603.
D. Knebel, et. al., “Diagnosis and Characterization of Timing-Related Defects by Time-Dependent Light Emission”, Proc. IEEE International Test Conf, pp. 733-739, 1998.
M. Bruce, V. Bruce, “ABCs of Emission Microscopy”, Electronic Device Failure Analysis, pp. 13-20, Volume 5, Issue 3, August 2003.
T. Eiles, et al., “Critical Timing Analysis in Microprocessors Using Near-IR Laser Assisted Device Alteration (LADA)”, Proc. IEEE International Test Conf., pp. 264-273, 2003.
A. Chandrakasan, et al., Design of High-Performance Microprocessor Circuits, Wiley-IEEE Computer Society Press, 2000, ISBN: 078036001X.
K. Bernstein, et al., High Speed CMOS Design Styles, Kluwer Academic Publishers, 1998, ISBN: 079238220X.
F. Schellenberg, “A Little Light Magic [Optical Lithography] ”, IEEE Spectrum, pp. 34-39, Volume 40, Issue 9, September 2003.
W. Huott, et al., “The Attack of the ‘Holey Shmoos’: A Case Study of Advanced DFD and Picosecond Imaging Analysis (PICA)”, Proc. IEEE International Test Conf., pp. 883-891, 1999.
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Josephson, D., Gottlieb, B. (2006). Silicon Debug. In: Gizopoulos, D. (eds) Gizopoulos / Advances in ElectronicTesting. Frontiers in Electronic Testing, vol 27. Springer, Boston, MA. https://doi.org/10.1007/0-387-29409-0_3
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