Abstract
This chapter presents a collection of case studies dealing with electromagnetic compatibility of integrated circuits. Emission and susceptibility of microcontrollers from several IC manufacturers are measured using standard methods and predicted using a macro-modeling approach. Specific test chips dedicated to the characterization of internal switching noise and to the validation of low emission design techniques are also described.
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References
Bouhouch, L., Mediouni, M., Sicard, E., 2004, Effects of micro-controller I/Os on the conducted noise emission, 4th International Workshop on Electromagnetic Compatibility of Integrated Circuits, Angers, France.
Box, G., Hunter, W., Stuart, Hunter J., 1978, Statistics for Experimenters, John Wiley and Sons Inc.
Coenen, M., Derikx, R., 2003, Design of Experiments on an EMC test chip for the interrogation of SI and EMC measures, IEEE International Symposium on EMC, Istanbul.
Delmas— Ben-Dhia, S., Caignet, F., Sicard, E., 2000, A new method for measuring signal integrity in CMOS ICs, Microelectronic International Journal, MCB University Press, 17(1):17–21.
Delorme, N., Belleville, M., Chilo, J., 1996, Inductance and capacitance analytic formulas for VLSI interconnects, Electron. Let., 32(11): 996–997.
Fiori, F., 2000, Prediction of RF interference effects in smart power integrated circuits, IEEE International Symposium on EMC, Washington D.C., pp. 345–347.
Fukumoto, H., et al., 1995, Inductance Calculation of Multiple Arbitrary Shaped Planes Using Finite Element Method, IEEE 4th EPEP, pp223–225.
Grabinski, H., Konrad, B., Nordholz, P., 1998, Simple formulas to calculate the line parameters of interconnects on conducting substrates, IEEE 7th Topical Meeting Electrical Performance Electron. Packag., West Point, NY, pp. 223–226.
Ichikawa, K., et al., 2004a, EMI Analysis of a PCB for Automotive Equipment Using an LSI Power Current Model, Int. Workshop on EMC of Integrated Circuits, Angers,. pp. 38–42.
Ichikawa, K., et al., 2004b, A Study on Measurement of LSI Immunity for PCB, IEICE Tech. Rep., EMCJ2004-115, pp. 77–82.
Levant, J.L., Ramdani, M., Perdriau, R., 2002, ICEM modeling of microcontroller current activity, 3rd international Workshop on Electromagnetic Compatibility of Integrated Circuits, Toulouse.
Lubineau, M., 2000, Towards an EMC model of Integrated Circuits, CEM Compo, Toulouse.
Mabuchi, Y., et al., 2005, LECCS (Linear Equivalent Circuit and Current Source) Modelling Technique for ICs. Int. Zurich Sympo. Electromagnetic Compatibility, Workshop W5, EMC for IC, Zurich, Switzerland, pp. 659–672.
MCS912DP25, 2002, htln://www.motorola.com.
MEDEA+ A509 MESDIE Project: www.mesdie.org.
Microwind & Dsch User’s Manual, ISBN 2-87649-046-3 http://www.microwind.org.
Padke, M, 1989, Quality Engineering using Robust Design, Prentice Hall.
Pozzolo, V., Tenti, P., Fiori, F., Spiazzi, G., Buso, S, 2002, Susceptibility of Integrated Circuit to RFI, Center for power electronics systems., annual power electronic seminar at Virginia Tech.
Ross, B., 2002, IBIS and ICEM, CEM Compo, Toulouse.
Schuster, Leonhardt, Fichtner, 2000 Electromagnetic Simulation of Bonding Wires and Comparison with Wide Band Measurements, IEEE Transaction on Advanced Packaging, 23(1).
Sicard, E, 2005, IC-emc freeware software: www.ic-emc.org.
Smith, M., 2003, SPICE simulation shareware software: http:www.winspice.com.
Takahashi, E., et al., 2002, Evaluation of LSI Immunity to Noise Using an Equivalent Internal Impedance Model, EMC Europe Int. Sympo. on EMC, Sorrento, pp. 487–492.
Vrignon, B., Ben Dhia, S., Courau, L., Sicard, E., 2004a, Cesame a test chip for the validation of a parasitic emission prediction flow in 0.18um CMOS technology, IEEE Int. Symp. on EMC, Santa Clara, CA, USA.
Vrignon, B., Ben Dhia, S., Lamoureux, E., Sicard, E., 2004b, Evaluation of low emission IC design techniques efficiency, 4th Int. Workshop on EMC of ICs, Angers, France.
Vrignon, B., Ben Dhia, S., Lamoureux, E., Sicard, E., 2005, Characterization and modelling of parasitic emission in deep submicron CMOS, IEEE Trans. on EMC, 47(2).
Wang, A. Z. H., 2002, On-chip ESD Protection for Integrated Circuits, Kluwer Academic Publishers.
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Ben Dhia, S., Ramdani, M., Sicard, E. (2006). Case Studies. In: Ben Dhia, S., Ramdani, M., Sicard, E. (eds) Electromagnetic Compatibility of Integrated Circuits. Springer, Boston, MA. https://doi.org/10.1007/0-387-26601-1_6
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DOI: https://doi.org/10.1007/0-387-26601-1_6
Publisher Name: Springer, Boston, MA
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