Abstract
This chapter addresses the impact of digital substrate noise on analog circuits embedded in mixed-signal integrated systems. A high-level modeling methodology is presented that allows to simulate in acceptable CPU times the impact of a complex noise signal resulting from a large digital part on the performance of an embedded analog part in a large mixed-signal system. Measurements were performed on an embedded comparator, and show the important impact of the digital noise on this design. The measurement results were used to predict the impact on an embedded analog-to-digital converter.
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Zinzius, Y., Gielen, G., Sansen, W. (2004). Modeling the Impact of Digital Substrate Noise on Analog Integrated Circuits. In: Donnay, S., Gielen, G. (eds) Substrate Noise Coupling in Mixed-Signal ASICs. Springer, Boston, MA. https://doi.org/10.1007/0-306-48170-7_7
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DOI: https://doi.org/10.1007/0-306-48170-7_7
Publisher Name: Springer, Boston, MA
Print ISBN: 978-1-4020-7381-6
Online ISBN: 978-0-306-48170-3
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